C<inf>oss</inf> related energy loss in power MOSFETs used in zero-voltage-switched applications

Perspective of Loss Mechanisms for Silicon and Wide Band-Gap Power Devices

“…If this mechanism is lossless -we will see later that this is not entirely true -the energy, observed on the oscilloscope as overlap between voltage and current, equals the energy E oss , a value which is typically given in the datasheet. It is noteworthy that the energy stored in the output capacitance should be derived from large signal analysis not from small signal due to hysteresis effects especially in Superjunction devices [16], [17].…”

Origin of Anomalous <inline-formula> <tex-math notation="LaTeX">$C_{\mathrm {OSS}}$ </tex-math></inline-formula> Hysteresis in Resonant Converters With Superjunction FETs

“…All the aforementioned references converge on pinpointing that the C OSS -related power loss is a crucial and obscure topic in resonant circuits. Although none of these works provide physical insight, a relationship between power loss and an anomalous C OSS hysteresis is established in [3]. In this brief, we reproduce and elucidate the observations published in [3] by means of mixed-mode simulations.…”

“…Although none of these works provide physical insight, a relationship between power loss and an anomalous C OSS hysteresis is established in [3]. In this brief, we reproduce and elucidate the observations published in [3] by means of mixed-mode simulations. In fact, combining finite element with circuit analysis [7], we show that the C OSS hysteresis is due to stranded charges (Q STR ) that can be avoided by proper device design, without penalty on electrical performance.…”

“…The potential at the switching node (V SW ) represents V DS at the bottom FET, whereas V DD -V SW is V DS at the top FET, V DD being defined by the voltage source. More details for this circuit are found in [3]. Two finite-element SJ-FET structures, based on predominant technologies, are virtually tested in the circuit by means of mixed-mode simulation.…”

“…Nonetheless, more recent work suggests that the accentuated C OSS nonlinearity is detrimental to system efficiency in half-bridge (HB) resonant topologies [2]. Even more intriguing, recent publications from both device manufacturers and application vendors detected that the ultimate SJ generations perform poorly in resonant circuits [3], [4]. In a more general context, other works claim that the datasheet information of C OSS related loss is no longer valid for resonant converters [5], [6].…”