C-GEP: Adaptive network management with reconfigurable hardware

Orosz, Péter; Tóthfalusi, Tamás; Varga, Pál

doi:10.1109/inm.2015.7140417

Cited by 7 publications

(3 citation statements)

References 8 publications

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“…e performance per memory of the proposed design is at least 18% and at most 990% better than the best and the worst designs, namely, Pao and Lu [22] and Orosz et al [25].…”

Section: Implementation and Evaluationmentioning

confidence: 82%

A CRC-Based Classifier Micro-Engine for Efficient Flow Processing in SDN-Based Internet of Things

Abbasi

Mousavi

Rafiee

et al. 2020

Mobile Information Systems

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In the Internet of things (IoT), network devices and mobile systems should exchange a considerable amount of data with negligible delays. For this purpose, the community has used the software-defined networking (SDN), which has provided high-speed flow-based communication mechanisms. To satisfy the requirements of SDN in the classification of communicated packets, high-throughput packet classification systems are needed. A hardware-based method of Internet packet classification that could be simultaneously high-speed and memory-aware has been proved to be able to fill the gap between the network speed and the processing speed of the systems on the network in traffics higher than 100 Gbps. The current architectures, however, have not been successful in achieving these two goals. This paper proposes the architecture of a processing micro-core for packet classification in high-speed, flow-based network systems. By using the hashing technique, this classifying micro-core fixes the length of the rules field. As a result, with a combination of SRAM and BRAM memory cells and implementation of two ports on Virtex®6 FPGAs, the memory usage of 14.5 bytes per rule and a throughput of 324 Mpps were achieved in our experiments. Also, the performance per memory of the proposed design is the highest as compared to its major counterparts and is able to simultaneously meet the speed and memory-usage criteria.

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“…e performance per memory of the proposed design is at least 18% and at most 990% better than the best and the worst designs, namely, Pao and Lu [22] and Orosz et al [25].…”

Section: Implementation and Evaluationmentioning

confidence: 82%

A CRC-Based Classifier Micro-Engine for Efficient Flow Processing in SDN-Based Internet of Things

Abbasi

Mousavi

Rafiee

et al. 2020

Mobile Information Systems

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“…The sponsored research agreement between SmartCom Lab and IBM Research Zürich has started this year, based on our results provided by our FPGA-based monitoring equipment [197,198]. The target of the project is data center monitoring, with two main tracks: (i) intrusion detection and protection systems (ISD/IPS), and (ii) support for Software Defined Networking (SDN).…”

Section: Internet Of Things Platforms and Applicationsmentioning

confidence: 99%

BME VIK Annual Research Report on Electrical Engineering and Computer Science 2016

Charaf

Harsányi

Poppe

et al. 2017

Period. Polytech. Elec. Eng. Comp. Sci.

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Preface Since being established in 1949, the Faculty of Electrical Engineering and Informatics (VIK) BME has played a flagship role in the development of electronics, IT and computer science in Hungary.We László Jakab (dean, BME VIK) János Levendovszky (vice-dean in charge of scientific affairs, BME VIK) are proud of combining engineering applications with sound scientific results, which is the assurance of high-level industrial collaboration leading to novel results and innovation. The various collaborations with our industrial partners has made it clear that the industry expects methods and results which make their industrial processes more effective and increase productivity and quality. Thus, participation in these collaborations give a competitive edge and ensure the continuous development of VIK. These factors have positioned our Department of Automation and Applied InformaticsDepartment of Automation and Applied Informatics (AUT) is one of the largest and dynamically developing departments at BME with diverse scope competences such as control theory, embedded systems, software modelling, applied software development, Internet of Things, power electronics, mechatronics, and many others. The department's main activities are education, research and development. Training versatile electrical and software engineers with solid practical knowledge is our top priority. Our profile also includes developing high quality software and hardware solutions for industry partners. All of our activities are backed by strong research background.In 2016, the department organized and hosted a number of domestic and international events. In cooperation with the industry, AUT has organized the IoT4U conference. It was dedicated to Internet of Things, cloud and data management as well as the integration of IoT into various formats. RobonAUT, the yearly domestic amateur robotics contest was organized by the department in February 2016. The yearly contest is open to teams of students, organized either in student projects within the department or independent research teams.The next sections summarize the key research results of the department in year 2016. Software Development Methods and Mobile PlatformsThe diversity of mobile platforms necessitates the development of the same mobile application for all major mobile platforms, what requires considerable development effort. Mobile application developers are multiplatform developers, but they still prioritize the platforms, therefore, not all platforms are equally important for them. Appropriate methods, processes and tools are required to support the development in order to achieve better productivity.The research on educational mobile applications that adapt to the mental state of the user required a method for estimating the difficulty of tasks found in the serious games. There are generated or random assignments where the effort required from the user is not known or cannot be estimated in advance.61 (2) IoT and Smart CityThe Internet of Things (IoT) is transforming the surroun...

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“…The prototype boards, used in the demonstration, contain 1 CFP, 4 XFP and 4 SFP connectors to handle 100, 10 and 1 Gbit/s Ethernet, respectively. The conference paper entitled "C-GEP: Adaptive Network Management with Reconfigurable Hardware" [1] provides further, detailed description about the platform.…”

Section: Introductionmentioning

confidence: 99%

C-GEP: Platform demo for 100 Gbit/s network monitoring

Tóthfalusi

Orosz

Varga

2015

2015 IFIP/IEEE International Symposium on Integrated Network Management (IM)

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As the line rate reaches and exceeds 100 Gbit/s, the usage of hardware-accelerated networking equipment is getting a natural choice when evaluating newly developed network-related features. The requirement for high throughput and high level of reconfiguration together put Field Programmable Gate Array (FPGA) technology into the focus of high performance networking. In this demonstration, we show some of the capabilities of a new, 100 Gigabit Ethernet Evaluation Platform, called C-GEP. Since the hardware is reconfigurable, the platform can host a wide range of high-speed network specific applications, and it is aligned with the Software Defined Networking (SDN) principles. Our demonstration contains two different implementations of 100 Gbit/s-capable applications: a traffic generator and a traffic monitor engine. Our aim here is to show the feasibility of C-GEP for high-speed networking evaluations.

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C-GEP: Adaptive network management with reconfigurable hardware

Cited by 7 publications

References 8 publications

A CRC-Based Classifier Micro-Engine for Efficient Flow Processing in SDN-Based Internet of Things

A CRC-Based Classifier Micro-Engine for Efficient Flow Processing in SDN-Based Internet of Things

BME VIK Annual Research Report on Electrical Engineering and Computer Science 2016

C-GEP: Platform demo for 100 Gbit/s network monitoring

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