Bus Architectures for Safety-Critical Embedded Systems

Rushby, John

doi:10.1007/3-540-45449-7_22

Cited by 156 publications

(120 citation statements)

References 15 publications

Supporting

Mentioning

116

Contrasting

Unclassified

Order By: Relevance

“…Among the protocols that have been proposed for vehicle multiplexing, only the controller area network (CAN) [9], the local interconnection network (LIN) [10] and SAE's J1850 [11] are currently in use on a large scale. Moreover, only a few of them are suitable for safety-critical applications where predictability is mandatory [12]. A survey and comparison of communication protocols for safety-critical embedded systems is available in [12].…”

Section: Heterogeneous Communication Protocolsmentioning

confidence: 99%

“…Moreover, only a few of them are suitable for safety-critical applications where predictability is mandatory [12]. A survey and comparison of communication protocols for safety-critical embedded systems is available in [12]. Communication activities can be triggered either dynamically, in response to an event, or statically, at predetermined moments in time.…”

Section: Heterogeneous Communication Protocolsmentioning

confidence: 99%

“…The gateway node N G is only able to broadcast on the TTC in the slot S G of the TDMA rounds circulating on the TTP bus. According to the MEDL of the gateway, a set of messages not exceeding size S G of the data field of the frame travelling in slot S G will be removed from the front of the Out TTP queue in every round, and packed in the S G slot (12). Once the frame is broadcast (13) it will arrive at node N 1 (14), where all the messages in the frame will be copied in the input buffers of the destination processes (15).…”

Section: Software Architecturementioning

confidence: 99%

“…12). However, a worse solution can also be accepted with a certain probability that depends on the deterioration of the cost function and on a control parameter called temperature (lines [12][13].…”

Section: Frame Packing With Simulated Annealingmentioning

confidence: 99%

See 3 more Smart Citations

Analysis and optimisation of heterogeneous real-time embedded systems

Pop

Eles

Peng

2006

System-on-Chip: Next Generation Electronics

View full text Add to dashboard Cite

Section: Heterogeneous Communication Protocolsmentioning

confidence: 99%

Section: Heterogeneous Communication Protocolsmentioning

confidence: 99%

Section: Software Architecturementioning

confidence: 99%

Section: Frame Packing With Simulated Annealingmentioning

confidence: 99%

See 2 more Smart Citations

Analysis and optimisation of heterogeneous real-time embedded systems

Pop

Eles

Peng

2006

System-on-Chip: Next Generation Electronics

View full text Add to dashboard Cite

“…Examples of systems that provide these services are SAFEbus [HD92], TTA [Kop97], and MAFT [KWFT88]. Rushby presents an overview of how several architectures realize these fundamental services [Rus03].…”

Section: Introductionmentioning

confidence: 99%

A Unified Fault-Tolerance Protocol

Miner¹,

Geser

Pike³

et al. 2004

Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems

View full text Add to dashboard Cite

Abstract. Davies and Wakerly show that Byzantine fault tolerance can be achieved by a cascade of broadcasts and middle value select functions. We present an extension of the Davies and Wakerly protocol, the unified protocol, and its proof of correctness. We prove that it satisfies validity and agreement properties for communication of exact values. We then introduce bounded communication error into the model. Inexact communication is inherent for clock synchronization protocols. We prove that validity and agreement properties hold for inexact communication, and that exact communication is a special case. As a running example, we illustrate the unified protocol using the SPIDER family of fault-tolerant architectures. In particular we demonstrate that the SPIDER interactive consistency, distributed diagnosis, and clock synchronization protocols are instances of the unified protocol.

show abstract

Algorithms for reducing reconfiguration overheads using prefetch, reuse, and optimal mapping of tasks

Hariharan

Kannan

2018

Concurrency and Computation

View full text Add to dashboard Cite

Summary Field Programmable Gate Arrays (FPGAs) are preferred in the modern embedded system to accelerate the performance of the entire system. However, the FPGAs are liable to suffer from reconfiguration overheads. These overheads are mainly because of the configuration data being fetched from the off‐chip memory at run‐time and due to the improper management of tasks during execution. To reduce these overheads, two algorithms are proposed. Both the algorithms focus on the prefetch heuristics, reuse technique, and an optimal mapping of tasks over the available memories. However, in terms of reusing technique, algorithm‐1 uses least recently used (LRU) policy and algorithm‐2 uses the optimal replacement policy (considering the vitality of the reconfigurable units (RUs)). Simulation results are obtained for both the algorithms. It is evident from the result that most of the reconfiguration overheads are eliminated when the applications are managed and executed based on the proposed algorithms. Also, the two algorithm results are compared and analyzed. For this purpose, the experiments included smaller and larger task graphs. In the case of smaller task graphs, algorithm‐2 outperforms algorithm‐1 in reducing reconfiguration overheads. In larger task graphs, algorithm‐1 produces better results compared to algorithm‐2.

show abstract

Bus Architectures for Safety-Critical Embedded Systems

Cited by 156 publications

References 15 publications

Analysis and optimisation of heterogeneous real-time embedded systems

Analysis and optimisation of heterogeneous real-time embedded systems

A Unified Fault-Tolerance Protocol

Algorithms for reducing reconfiguration overheads using prefetch, reuse, and optimal mapping of tasks

Contact Info

Product

Resources

About