Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor

Lee, Ding-Yuan; Wang, Ching-Che; Wu, An-Yeu

doi:10.1109/tvlsi.2019.2891507

Cited by 17 publications

(9 citation statements)

References 15 publications

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“…SDCC integrates a range of network security control services into a single pane of glass view for analysis and control [115], [117]. This orchestration is critical for compliance requirements.…”

Section: Securitymentioning

confidence: 99%

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Software-Defined Cloud Computing: A Systematic Review on Latest Trends and Developments

Abbasi

Shamshirband

et al. 2019

IEEE Access

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Cloud computing concepts offer effective and efficient tools for addressing resource-hungry computational problems. While conventional methods, architectures, and processing techniques may limit cloud data center performance, software-defined cloud computing (SDCC) is an approach where virtualization services to all network resources in a dc are software-defined and where software-defined networking (SDN) and cloud computing go hand in hand. SDCC-related concepts change the previous state of affairs by promoting the centralized control of networking functions in a data center. A key objective of developing software-driven cloud infrastructure is that the networking hardware, software, storage, security, and network traffic management is open and interoperable. This facilitates easy installation and management of networking functions in the cloud infrastructure. Employing SDCC concepts to cloud data centers can improve resource administration challenges to a greater extent. This paper presents a survey on SDCC. We begin by introducing SDCC environments and explain its main architectural components. We identify the essential contributions of various developments to this field and discuss the implementation challenges and limitations faced in their adoption. We also explore the potential of SDCC in two domains, namely, resource orchestration and application development, as case studies of specific interest. In an attempt to anticipate the future evolution, we discuss the important research opportunities and challenges in this promising field.

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Section: Securitymentioning

confidence: 99%

“…STRIDE on the other hand analyzes a network for its susceptibility to threats. STRIDE has also been employed in [117] to enumerate potential vulnerabilities of OpenFlow on widely used virtual switch and controller applications.…”

Section: Securitymentioning

confidence: 99%

Software-Defined Cloud Computing: A Systematic Review on Latest Trends and Developments

Abbasi

Shamshirband

et al. 2019

IEEE Access

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“…BRAM-based CAMs including EE-TCAM have higher update latency of at least 512 clock cycles because of the monolithic structure of BRAM [24]. BU-TCAM [29] updates the memory in the form of multiple words and not word by word, but the worst case latency still remains 512 clock cycles for a CAM having 512 locations. On the other hand, our proposed BCAM architecture has update latency of 64 clock cycles independent of the number of words in CAM memory which is discussed in Section 4.5.…”

Section: Related Workmentioning

confidence: 99%

Zi-CAM: A Power and Resource Efficient Binary Content-Addressable Memory on FPGAs

2019

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Content-addressable memory (CAM) is a type of associative memory, which returns the address of a given search input in one clock cycle. Many designs are available to emulate the CAM functionality inside the re-configurable hardware, field-programmable gate arrays (FPGAs), using static random-access memory (SRAM) and flip-flops. FPGA-based CAMs are becoming popular due to the rapid growth in software defined networks (SDNs), which uses CAM for packet classification. Emulated designs of CAM consume much dynamic power owing to a high amount of switching activity and computation involved in finding the address of the search key. In this paper, we present a power and resource efficient binary CAM architecture, Zi-CAM, which consumes less power and uses fewer resources than the available architectures of SRAM-based CAM on FPGAs. Zi-CAM consists of two main blocks. RAM block (RB) is activated when there is a sequence of repeating zeros in the input search word; otherwise, lookup tables (LUT) block (LB) is activated. Zi-CAM is implemented on Xilinx Virtex-6 FPGA for the size 64 × 36 which improved power consumption and hardware cost by 30 and 32%, respectively, compared to the available FPGA-based CAMs.

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“…To overcome the high price and power consumption of TCAMs, a number of research studies are conducted to use a combination of TCAM and RAM [9 ], and some works (e.g. [11, 12 ]) propose an architecture to emulate TCAM by utilising static random access memory (SRAM). However, the high complexity of these solutions results in latency in search or update process in the memory access procedure.…”

Section: Introductionmentioning

confidence: 99%

Impact of TCAM size on power efficiency in a network of OpenFlow switches

Ghiasian

2020

IET Networks

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Recent developments in networking include the interest in software-defined networking, in which OpenFlow switches are in charge of forwarding traffic by matching incoming packets with forwarding rules in their flow tables. Flow tables are commonly implemented in ternary content addressable memories (TCAMs). Typically, this type of memory tends to be extremely expensive and to be power-hungry devices. The price and power dissipation of TCAM depend on the capacity of the memory. A blind design of memory size can result in dramatic degradation in performance and power efficiency of the entire network. In this study, the authors clarify this impact and show how the optimum value of TCAM capacity is attainable. They also propose a power consumption model for TCAM-based OpenFlow switches. Simulation results show that the proposed solution reduces the average power consumption by 24% compared to the minimum link on method and by 11.5% compared to the minimum node on (MNO) method and thus power efficiency is better achieved when each memory is supplied by appropriate TCAM size.

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Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor

Cited by 17 publications

References 15 publications

Software-Defined Cloud Computing: A Systematic Review on Latest Trends and Developments

Software-Defined Cloud Computing: A Systematic Review on Latest Trends and Developments

Zi-CAM: A Power and Resource Efficient Binary Content-Addressable Memory on FPGAs

Impact of TCAM size on power efficiency in a network of OpenFlow switches

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