Building the electrical model of the pulsed photoelectric laser stimulation of an NMOS transistor in 90nm technology

Abstract

International audienceThis paper presents measurements of pulsed photoelectrical laser stimulation of an NMOS transistor in 90nm technology. The laser power was able to trig the NPN parasitic bipolar Drain/Psubstrate/Source. An electrical model is proposed in order to simulate effects induced by the laser. Results extracted from the electrical simulator are compared to measurements

Laser-Induced Fault Effects in Security-Dedicated Circuits

“…It tends almost toward zero after ten micrometers. These results illustrate perfectly the main features of laser-induced photocurrents in FDSOI: (a) the photocurrent magnitude is significantly lower than that induced in Bulk CMOS transistors which would be close to the mA range for these laser settings [10], and (b) as a consequence of the isolation box, the photocurrent is halved for a distance of approximately 4 µm (the laser spot diameter is 5 µm), while it takes several tens of µm to halve the photocurrent in the case of a transistor in the Bulk technology [10].…”

Laser fault injection into SRAM cells: Picosecond versus nanosecond pulses

“…Using the electrical model introduced by Sarafianos et al in [9], [11], [12], they were able to validate their results on simulation basis: the obtained map of laser-sensitive areas is given in figure 7 for a laser pulse duration of 50 ns. This laser-sensitivity map matches the experimental results (see figure 6): no bit-flip faults were obtained (there is no overlap between bit-set and bit-reset areas, given in red and blue respectively), the fourth laser-sensitive area of transistor MP2 is also missing.…”

“…They also came to the conclusion that the bit-set/bit-reset fault model is the relevant one as they did not obtain any bit-flip type fault. They also validated their results through simulation using the electrical model of transistors exposed to laser stimulation described in [9], [11], [12]. Finally, they obtained further validation of their results by performing fault injection experiments on the RAM memory of a microcontroller.…”

“…They introduced two different electrical models: one for short laser pulses and the other for long laser pulses (the threshold between short and long pulses was around one nanosecond). We chose another approach: using the electrical model already introduced by Sarafianos et al [9], [11], [12] for laser pulses in the nanosecond range. However, we changed several parameters of their model in order to take into account the laser pulse duration and our assumption of a reduced effect area for shorter laser pulses.…”

“…For the sake of brevity we refer the reader to the corresponding bibliography [9], [11], [12] for a complete description of this electrical model. It is mostly built to take into account the laser-induced photocurrents.…”