Broker Fault Recovery for a Multiprocessor System-an-Chip Middleware

Domingues, Anderson R. P.; Hamerski, Jean Carlo; Amory, Alexandre M.

doi:10.1109/sbcci.2018.8533254

Cited by 3 publications

(2 citation statements)

References 11 publications

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“…However, solutions that encompass a fault tolerance focused on the system management are scarce. Table 1 presents two works with faulttolerance at the management cores [11,26]. Domingues et al [11], propose a system management technique targeting only the communication between PEs.…”

Section: Related Workmentioning

confidence: 99%

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System management recovery in NoC-based many-core systems

Silva

Caimi

Moraes

et al. 2020

Analog Integr Circ Sig Process

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The technology nodes reduction enabled the emergence of NoC-based many-cores with dozens to hundreds of processing elements (PEs). Despite the processing power offered by a large number of processors and communication flexibility due to the adoption of NoCs, it is necessary to manage the many-core resources to ensure scalability. The execution of the management tasks requires a PE reserved exclusively to execute such actions. These processors are named managers PE-MPE. A centralized approach would induce a significant load to the MPE in large-scale systems, and a permanent fault in the MPE would compromise the entire system. The adoption of a distributed approach, organization adopted in this work, with MPEs hierarchically organized, reduces the management load, and a fault in an MPE would compromise only the PEs managed by the faulty MPE. The literature presents several fault-tolerant proposals targeting the NoC or the processors. However, there is a significant gap related to fault-tolerant methods at the system level, i.e., related to fault-tolerant techniques regarding the MPEs. The goal of this paper is to present a recovery method when an MPE became faulty, and propose a protocol to migrate the management software safely to a new PE. The method adopts task migration to release a processor if there is no processor to receive the kernel that was executing in a faulty processor. The proposal is transparent to the applications running in the many-core, with an overhead in the execution time varying between 1.5 and 1.65 ms during the management and task migration.

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Section: Related Workmentioning

confidence: 99%

“…Table 1 presents two works with faulttolerance at the management cores [11,26]. Domingues et al [11], propose a system management technique targeting only the communication between PEs. The Authors propose a lightweight fault recovery mechanism for brokers (their MPEs) of a publish-subscribe middleware.…”

Section: Related Workmentioning

confidence: 99%

System management recovery in NoC-based many-core systems

Silva

Caimi

Moraes

et al. 2020

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

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A fault recovery protocol for brokers in centralized publish-subscribe systems targeting multiprocessor systems-on-chips

Domingues

Hamerski

Amory

2020

Analog Integr Circ Sig Process

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A Survey of MPSoC Management toward Self-Awareness

Gonzalez-Martinez,

Sandoval-Arechiga,

Solis-Sanchez

et al. 2024

Micromachines

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Managing Multi-Processor Systems-on-Chip (MPSoCs) is becoming increasingly complex as demands for advanced capabilities rise. This complexity is due to the involvement of more processing elements and resources, leading to a higher degree of heterogeneity throughout the system. Over time, management schemes have evolved from simple to autonomous systems with continuous control and monitoring of various parameters such as power distribution, thermal events, fault tolerance, and system security. Autonomous management integrates self-awareness into the system, making it aware of its environment, behavior, and objectives. Self-Aware Cyber-Physical Systems-on-Chip (SA-CPSoCs) have emerged as a concept to achieve highly autonomous management. Communication infrastructure is also vital to SoCs, and Software-Defined Networks-on-Chip (SDNoCs) can serve as a base structure for self-aware systems-on-chip. This paper presents a survey of the evolution of MPSoC management over the last two decades, categorizing research works according to their objectives and improvements. It also discusses the characteristics and properties of SA-CPSoCs and explains why SDNoCs are crucial for these systems.

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Broker Fault Recovery for a Multiprocessor System-an-Chip Middleware

Cited by 3 publications

References 11 publications

System management recovery in NoC-based many-core systems

System management recovery in NoC-based many-core systems

A fault recovery protocol for brokers in centralized publish-subscribe systems targeting multiprocessor systems-on-chips

A Survey of MPSoC Management toward Self-Awareness

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