2020
DOI: 10.1109/tc.2019.2958611
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Branch Prediction Attack on Blinded Scalar Multiplication

Abstract: In recent years, performance counters have been used as a side channel source to monitor branch mispredictions, in order to attack cryptographic algorithms. However, the literature considers blinding techniques as effective countermeasures against such attacks. In this work, we present the first template attack on the branch predictor. We target blinded scalar multiplications with a side-channel attack that uses branch misprediction traces. Since an accurate model of the branch predictor is a crucial element o… Show more

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Cited by 12 publications
(8 citation statements)
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“…The feedforward loop of the PUF circuit is shown in Figure 6, and its quantity has a significant impact on the stability and ML attack resistance of the PUF circuit. The relationship between the number of feedforward circuits NumFF (only consider the original APUF) and the number of interval switch units NumSU is shown in Equation (6).…”
Section: The Confidentiality Protection Modulementioning
confidence: 99%
“…The feedforward loop of the PUF circuit is shown in Figure 6, and its quantity has a significant impact on the stability and ML attack resistance of the PUF circuit. The relationship between the number of feedforward circuits NumFF (only consider the original APUF) and the number of interval switch units NumSU is shown in Equation (6).…”
Section: The Confidentiality Protection Modulementioning
confidence: 99%
“…Uzelac et al [31] proposed a methodology to reverseengineer branch predictors. Bhattacharya et al [1] reconstructed the branch direction predictors of Intel CPUs from Nehalem to Broadwell and showed their consistency with 2bit (Nehalem) or 3-bit saturating counters. This insight led to a side-channel attack on blinded scalar multiplication.…”
Section: Reverse Engineering Of Other Componentsmentioning
confidence: 99%
“…This structure is used as a base predictor to predict the direction of conditional branches. Previous studies [7], [18], [25], [85] indicated presence of mechanism similar to gshare [83] with two modes of addressing: the simple 1-level mode where virtual address of branch is used to find a PHT entry, and a more complex 2-level mode where the branch virtual address is hashed with global history register (GHR) enabling accurate prediction complex patterns. RSB is used to predict return instructions.…”
Section: B Bpu Baseline Modelmentioning
confidence: 99%