2016
DOI: 10.1109/ted.2015.2509964
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Bonding Pad Over Active Structure for Chip Shrinkage of High-Power AlGaN/GaN HFETs

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Cited by 8 publications
(6 citation statements)
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“…To drive the passive‐matrix µ‐LED arrays, n‐pad line layers and a p‐pad line layer were applied by inter‐metal dielectric (IMD) layer patterning using organic photosensitive polyimide (PSPI) and a standard photolithography process (5‐µm‐thick organic PSPI layer). The optimized Ni (50 nm), Al (100 nm), Ti (25 nm), Al (500 nm), Ti (25 nm), and Al (500 nm) n‐pad line layers were deposited on the PSPI IMD layers after O 2 plasma treatment . The p‐pad line layer was formed using similar steps to those for the n‐pad line layer.…”
Section: Methodsmentioning
confidence: 99%
“…To drive the passive‐matrix µ‐LED arrays, n‐pad line layers and a p‐pad line layer were applied by inter‐metal dielectric (IMD) layer patterning using organic photosensitive polyimide (PSPI) and a standard photolithography process (5‐µm‐thick organic PSPI layer). The optimized Ni (50 nm), Al (100 nm), Ti (25 nm), Al (500 nm), Ti (25 nm), and Al (500 nm) n‐pad line layers were deposited on the PSPI IMD layers after O 2 plasma treatment . The p‐pad line layer was formed using similar steps to those for the n‐pad line layer.…”
Section: Methodsmentioning
confidence: 99%
“…Despite the challenge, Oh et al realized multilevel metallization structures on AlGaN/GaN HEMTs using a photosensitive-polyimide intermetal dielectric (IMD) layer depicted in Fig. 13 [76,77]. The multilevel Vertical temperature distributions across epitaxial layers directly under the gate finger for the reference HEMT with a through-wafer source-contact via hole and the HEMT with both a through-wafer source-contact via hole and an additional through Si-substrate via hole under the active area filled with copper (Reproduced from Ref.…”
Section: Thermal Management Solutions For Power Electronicsmentioning
confidence: 99%
“…In recent years, the static characteristics of BPOA devices, especially the on-state current conduction capability, have been extensively investigated [3,8]. Sönmez et al [10] have demonstrated significantly improved on-state current density of D-mode HEMTs based on area-efficient BPOA.…”
Section: Introductionmentioning
confidence: 99%
“…cascade-type co-package configurations, the depletion-mode sapphire-based HEMT (D-mode HEMT) assembly as the core component encroaches on a larger chip area [4][5][6], resulting in packaging-related costs and limiting chip miniaturization. In order to alleviate the area consumption caused by high-voltage device scaling, bonding pad over active (BPOA) architecture has been demonstrated as an effective solution to optimize structural layout (see figure 1) [3], enabling 50%-74% area reduction [7,8] as compared to conventional horizontal pad layout devices (i.e. the pad electrodes and the multi-finger active area are on the same base plane).…”
Section: Introductionmentioning
confidence: 99%