Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA

Tee, Tong Yan; Ng, Hun Shen; Zhong, Zhang

doi:10.1016/j.microrel.2006.01.010

Cited by 32 publications

(13 citation statements)

References 9 publications

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“…Failure was defined as the number of cycles where the electrical resistance reading was above 300X. This value was used in other companies as well (e.g., ST Microelectronics [31][32][33]). The test standard followed is JESD22-A104-B, and the thermal profile used is À40°C to 125°C (42 min/cycle, 1 min ramp and 20 min dwell).…”

Section: Thermal Cycling Testmentioning

confidence: 99%

Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP)

Zhang

Kripesh

Chai

et al. 2008

Microelectronics Reliability

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Section: Thermal Cycling Testmentioning

confidence: 99%

Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP)

Zhang

Kripesh

Chai

et al. 2008

Microelectronics Reliability

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“…In traditional package, thermal fatigue failure of solder joints had been widely investigated. 4,5 However, the study of fatigue phenomenon of TSV interconnects is still very limited. Zhang et al 6 investigated the thermal stress on copper TSVs, and addressed the reliability concerns through numerical simulation.…”

Section: Introductionmentioning

confidence: 99%

Investigation of durability of TSV interconnect by numerical thermal fatigue analysis

Choa

Song

Lee

2011

Int. J. Precis. Eng. Manuf.

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3D packaging using through silicon via (TSV) technology is becoming important in IC packaging industry. However, increased number of interconnects and extreme miniaturization suggest that thermo-mechanical reliability and fatigue will aggravate. In traditional package, thermo-mechanical fatigue failure mostly occurs as a result of damage in the solder joint. In TSV technology, however, the driving failure may be the TSV via or TSV interconnects. In this study, the durability of TSV technology is investigated using finite element method. Thermal fatigue phenomenon due to the plastic strain caused by repetitive temperature cycling is analyzed, and possible failure locations are discussed. In particular, the effects of via size, underfill material, and via filling material on the thermal fatigue reliability are investigated. The expected fatigue life indicates that the presence of underfill material is essential in improving the durability of the TSV structure. The plastic strain increases with the via size increases, therefore the thermal fatigue life increases as the via size decreases. For different via filling materials such as copper, nickel and tungsten, amount of plastic strain is very similar, suggesting that nickel could be used for via filling material. However, the locations of the maximum strain are different for each filling material.

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“…As the industry moves into a new era, new challenges in wire bonding emerge, such as reduction in wire size, cost and bond pad pitch, emergence of alloyed gold wires and copper wires, increase in I/O numbers, and reliable wire bonding of ultra-fine-pitch low-k devices (Viswanath et al, 2005;Kim et al, 2006;Fiori et al, 2007a, b;Viswanath et al, 2007). To deal with these challenges, capillaries must have very small holes and tip diameters with good ultrasonic energy transfer (Zhong and Goh, 2006), and customized designs for multitier bonding, stacked-dies wire bonding (Tee et al, 2006), and wire bonding using insulated wire (Zhong, 2008). The wire must have high-tensile strength and a short heat affected zone for low-loop requirements.…”

Section: Introductionmentioning

confidence: 99%

Wire bonding using copper wire

Zhong

2009

Microelectronics International

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Purpose-This paper attempts to review recent advances in wire bonding using copper wire. Design/methodology/approach-Dozens of journal and conference articles published recently are reviewed. Findings-The problems/challenges such as wire open and short tail defects, poor bondability for stitch/wedge bonds, oxidation of Cu wire, strainhardening effects, and stiff wire on weak support structures are briefly analysed. The solutions to the problems and recent findings/developments in wire bonding using copper wire are discussed. Research limitations/implications-Because of page limitation of the paper, only a brief review is conducted. Further reading is needed for more details. Originality/value-This paper attempts to provide introduction to recent developments and the trends in wire bonding using copper wire. With the references provided, readers may explore more deeply by reading the original articles.

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Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA

Cited by 32 publications

References 9 publications

Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP)

Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP)

Investigation of durability of TSV interconnect by numerical thermal fatigue analysis

Wire bonding using copper wire

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