2019
DOI: 10.1109/tcomm.2018.2869564
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Block Markov Superposition Transmission of BCH Codes With Iterative Erasures-and-Errors Decoders

Abstract: In this paper, we present the block Markov superposition transmission of BCH (BMST-BCH) codes, which can be constructed to obtain a very low error floor. To reduce the implementation complexity, we design a low complexity iterative sliding-window decoding algorithm, in which only binary and/or erasure messages are processed and exchanged between processing units. The error floor can be predicted by a genie-aided lower bound, while the waterfall performance can be analyzed by the density evolution method. To ev… Show more

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Cited by 16 publications
(3 citation statements)
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References 22 publications
(30 reference statements)
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“…接收端通常 采用滑动窗口迭代译码算法, 性能可以借助精灵辅助 (genie-aided, GA) 下界进行预测 [60] . BMST 可 采用短卷积码 [56] , BCH 码 [61] 等作为基本码, 利用基本码的编译码算法进行编译码, 其具有码率可调, 构造普适的优势.…”
Section: 分组马尔可夫 (Markov) 叠加传输技术unclassified
“…接收端通常 采用滑动窗口迭代译码算法, 性能可以借助精灵辅助 (genie-aided, GA) 下界进行预测 [60] . BMST 可 采用短卷积码 [56] , BCH 码 [61] 等作为基本码, 利用基本码的编译码算法进行编译码, 其具有码率可调, 构造普适的优势.…”
Section: 分组马尔可夫 (Markov) 叠加传输技术unclassified
“…for an SNR range of 0=10 dB [4]. Typically, the error drops as a function of the iterative decoding in several error detection and correction coding techniques [5].…”
Section: Fig2 Typical Error Performance Of Shannon's Limitmentioning
confidence: 99%
“…Implementing robust error detection and correction mechanisms is crucial for the overall reliability and performance of VLSI circuits [3]. VLSI circuits can be susceptible to different types of errors, such as single-bit errors, multiple-bit errors, and intermittent faults [4]. Single-bit errors involve the corruption of a single binary digit, while multiple-bit errors affect more than one bit simultaneously [5].…”
Section: Introductionmentioning
confidence: 99%