BitBench: a benchmark for bitstream computing

B it SAD v2

“…To illustrate the benefits of bitstream computing, we use BitSAD to generate Verilog for several kernels from the BitBench suite [7]. Floating point (FP) and fixed point (FXP) baselines are created using Vivado High-Level Synthesis (HLS).…”

“…Stochastic bitstreams are generated using an LFSR, but we do not include these in the hardware costs. As mentioned in the benchmark [7], these kernels are meant to be end-to-end stochastic circuits, so the LFSRs would not exist in real systems, and they are only a side-effect of our testing environment. The SVF, BQ, and MA filters are deterministic bitstream designs, and they are evaluated on one second of audio data [15].…”

“…But the sample frequency, F s , can be controlled in a PDM system (fixed at 44.1 kHz in PCM), since 3 MHz is a much higher sample rate than the application requires. By controlling F s , PDM systems can choose lowprecision coefficients that are powers of 2, leading to smaller and more efficient filters [7]. To enable building deterministic bitstream systems, BitSAD provides the DBitstream data type and a set of operations on it.…”

“…There can be several layers of sub-systems in the hierarchy. For example, consider a designer building a deterministic bitstream system to implement a hearing aid [7] that is composed of several filters. In Listing 7, a separate BitSAD program already implements a bi-quad filter in PDMBandpassFilterBQ.scala.…”

Quanta Burst Photography

“…In our current implementation, the binary frames are treated as real numbers (e.g., when warping them during the merging stage). One potential way to improve the efficiency is to utilize specialized computing architectures and algorithms for binary data [Daruwalla et al 2019;Pfeiffer and Pfeil 2018].…”