System Level Design From HW/SW to Memory for Embedded Systems
 2017
DOI: 10.1007/978-3-319-90023-0_5
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Bit-Precise Formal Verification for SystemC Using Satisfiability Modulo Theories Solving

Lydia Jaß1,
Paula Herber2
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Cited by 4 publications
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References 12 publications
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Combining Forces: How to Formally Verify Informally Defined Embedded Systems

Herber
1
,
Liebrenz
2
,
Adelt
3
2021
Lecture Notes in Computer Science
2
0
0
0
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Combining Forces: How to Formally Verify Informally Defined Embedded Systems

Herber
1
,
Liebrenz
2
,
Adelt
3
2021
Lecture Notes in Computer Science
2
0
0
0
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Deductive Verification of Parameterized Embedded Systems Modeled in SystemC

Tasche,
Monti,
Drerup
et al. 2023
Lecture Notes in Computer Science
1
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Dependence Analysis and Automated Partitioning for Scalable Formal Analysis of SystemC Designs

Herber
1
,
Liebrenz
2
2020
2020 18th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)
2
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