Bit-Labeling and Page Capacities of TLC Non-Volatile Flash Memories

Thiers, Johann-Philipp; Bailon, Daniel Nicolas; Freudenberger, Jürgen

doi:10.1109/icce-berlin50680.2020.9352190

Cited by 6 publications

(11 citation statements)

References 16 publications

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“…To approximate the measured distributions, we use a parameter estimation approach presented in [37]. The distributions f (x | L i ) are modeled by a piecewise-defined function…”

Section: Parameter Estimationmentioning

confidence: 99%

“…This adaptation method is also based on the assumption of Gaussian voltage distributions. However, the cell threshold voltage distributions of MLC and TLC are actually highly asymmetric with exponential tails [23,36,37] and cannot be estimated with Gaussian distribution. In [25,30], coding methods based on Berger codes are suggested that exploit the asymmetric error probabilities of the channel.…”

Section: Introductionmentioning

confidence: 99%

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Read Reference Calibration and Tracking for Non-Volatile Flash Memories

et al. 2021

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The performance and reliability of nonvolatile NAND flash memories deteriorate as the number of program/erase cycles grows. The reliability also suffers from cell-to-cell interference, long data retention time, and read disturb. These processes effect the read threshold voltages. The aging of the cells causes voltage shifts which lead to high bit error rates (BER) with fixed predefined read thresholds. This work proposes two methods that aim on minimizing the BER by adjusting the read thresholds. Both methods utilize the number of errors detected in the codeword of an error correction code. It is demonstrated that the observed number of errors is a good measure for the voltage shifts and is utilized for the initial calibration of the read thresholds. The second approach is a gradual channel estimation method that utilizes the asymmetrical error probabilities for the one-to-zero and zero-to-one errors that are caused by threshold calibration errors. Both methods are investigated utilizing the mutual information between the optimal read voltage and the measured error values. Numerical results obtained from flash measurements show that these methods reduce the BER of NAND flash memories significantly.

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“…To approximate the measured distributions, we use a parameter estimation approach presented in [37]. The distributions f (x | L i ) are modeled by a piecewise-defined function…”

Section: Parameter Estimationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Read Reference Calibration and Tracking for Non-Volatile Flash Memories

et al. 2021

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“…Depending on the bit labeling, a different number of read operations is needed for the different pages, and accordingly, the read latency depends on the bit labeling. In addition, bit labeling affects the error probability of the pages [23].…”

Section: Introductionmentioning

confidence: 99%

“…Such an encoding scheme minimizes latency for page-wise random access. However, the error probability and the total cell capacity is not completely balanced with Gray codes [23].…”

Section: Introductionmentioning

confidence: 99%

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Error Correction for TLC and QLC NAND Flash Memories Using Cell-Wise Encoding

2022

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The growing error rates of triple-level cell (TLC) and quadruple-level cell (QLC) NAND flash memories have led to the application of error correction coding with soft-input decoding techniques in flash-based storage systems. Typically, flash memory is organized in pages where the individual bits per cell are assigned to different pages and different codewords of the error-correcting code. This page-wise encoding minimizes the read latency with hard-input decoding. To increase the decoding capability, soft-input decoding is used eventually due to the aging of the cells. This soft-decoding requires multiple read operations. Hence, the soft-read operations reduce the achievable throughput, and increase the read latency and power consumption. In this work, we investigate a different encoding and decoding approach that improves the error correction performance without increasing the number of reference voltages. We consider TLC and QLC flashes where all bits are jointly encoded using a Gray labeling. This cell-wise encoding improves the achievable channel capacity compared with independent page-wise encoding. Errors with cell-wise read operations typically result in a single erroneous bit per cell. We present a coding approach based on generalized concatenated codes that utilizes this property.

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Read Reference Voltage Adaptation for NAND Flash Memories With Neural Networks Based on Sparse Histograms

2023

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Non-volatile NAND flash memories store information as an electrical charge. Different read reference voltages are applied to read the data. However, the threshold voltage distributions vary due to aging effects like program erase cycling and data retention time. It is necessary to adapt the read reference voltages for different life-cycle conditions to minimize the error probability during readout. In the past, methods based on pilot data or high-resolution threshold voltage histograms were proposed to estimate the changes in voltage distributions. In this work, we propose a machine learning approach with neural networks to estimate the read reference voltages. The proposed method utilizes sparse histogram data for the threshold voltage distributions. For reading the information from triple-level cell (TLC) memories, several read reference voltages are applied in sequence. We consider two histogram resolutions. The simplest histogram consists of the zero-and-one ratios for the hard decision read operation, whereas a higher resolution is obtained by considering the quantization levels for soft-input decoding. This approach does not require pilot data for the voltage adaptation. Furthermore, only a few measurements of extreme points of the threshold voltage distributions are required as training data. Measurements with different conditions verify the proposed approach. The resulting neural networks perform well under other life-cycle conditions.INDEX TERMS Non-volatile NAND flash, channel estimation, machine learning, neural network, read reference adjustment.

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Bit-Labeling and Page Capacities of TLC Non-Volatile Flash Memories

Cited by 6 publications

References 16 publications

Read Reference Calibration and Tracking for Non-Volatile Flash Memories

Read Reference Calibration and Tracking for Non-Volatile Flash Memories

Error Correction for TLC and QLC NAND Flash Memories Using Cell-Wise Encoding

Read Reference Voltage Adaptation for NAND Flash Memories With Neural Networks Based on Sparse Histograms

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