2001
DOI: 10.1109/92.920830
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BIST-based test and diagnosis of FPGA logic blocks

Abstract: We present a Built-In Self-Test (BIST) approach able to detect and accurately diagnose all single and practically all multiple faulty programmable logic blocks (PLBs) in Field Programmable Gate Arrays (FPGAs) with maximum diagnostic resolution. Unlike conventional BIST, FPGA BIST does not involve any area overhead or performance degradation. We also identify and solve the problem of testing configuration multiplexers, that was either ignored or incorrectly solved in most previous work. We introduce the first d… Show more

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Cited by 100 publications
(55 citation statements)
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“…TPGs can be efficiently implemented by counters or linear feedback shift registers to exhaustively generate all stimuli for a module under test. ORAs can be implemented by mutually comparing corresponding outputs of similarly configured modules under test [18].…”
Section: State Of the Art Fpga Testmentioning
confidence: 99%
“…TPGs can be efficiently implemented by counters or linear feedback shift registers to exhaustively generate all stimuli for a module under test. ORAs can be implemented by mutually comparing corresponding outputs of similarly configured modules under test [18].…”
Section: State Of the Art Fpga Testmentioning
confidence: 99%
“…The approach relies on a negative selection algorithm [8] coupled with a more "conventional" mechanism that could be based on roving self-test areas (STAR) [1]. In practice, the approach merges a fixed testing mechanism (the innate part of the immune system) with a learning negative selection mechanism (the acquired part), working at a system or subsystem level to monitor the state of the circuit and identify and kill cells that develop faults at runtime.…”
Section: Organismic-level Fault Tolerancementioning
confidence: 99%
“…There exist, for both processes, many "conventional" approaches [1,10,12], but no really efficient off-the-shelf solution. Drawing once again inspiration from nature, where "fault tolerance" is achieved through not one, but a set of mechanisms ranging from molecular repair to complex organism-level immune systems, we are developing a hierarchical approach to fault tolerance, spanning all the levels (Fig.…”
Section: Implementation Issuesmentioning
confidence: 99%
“…The second problem is concerned with identifying the set of failing test vectors [12,13,8]. A third related BISTdiagnosis problem is concerned with the identification of faulty logic blocks in FPGAs [15,1].…”
Section: Introductionmentioning
confidence: 99%