Bipolar transistor epilayer design using the MAIDS mixed-level simulator

Abstract

Abstract-In this paper, we address the epilayer design of the bipolar transistor using the one-dimensional (1-D) mixed-level simulator MAIDS (microwave active integral device simulator). MAIDS facilitates simulation of the electrical behavior of bipolar (hetero) junction transistors with various doping profiles and under different signal conditions in a realistic circuit environment. MAIDS as implemented within Hewlett Packard's microwave design system is a useful and promising tool in the development of bipolar transistors for large-signal conditions. Using MAIDS, we have identified the dominant bipolar transistor distortion sources with respect to the biasing conditions. Simulation results are compared with small-and large-signal measurements for the BFQ135 transistor, which has been developed for cable television (CATV) applications. By analyzing the measured and simulated data, we have developed an optimum epilayer design map for third-order intermodulation distortion that has proven to be particularly useful in the epilayer dimensioning of transistors for CATV applications.

A novel frequency-independent third-order intermodulation distortion cancellation technique for BJT amplifiers

“…We assume that the transistor is properly biased at an intermediate and relatively low . For these lower collector currents, exponential distortion dominates [6], whereas quasi-saturation and high injection effects are still negligible. Consequently, the predominant source of distortion is the nonlinear exponential characteristic, which in our analysis, for reasons of simplicity, is set equal to the ideal forward current [7]:…”

Virtual technology for RF process and device development

“…The integration of TCAD with circuit simulation can be obtained by driving the TCAD simulations from the circuit simulator (see e.g. [11]) or by using a compact transistor model as an intermediate step (see e.g. [12]), the latter approach is greatly facilitated by fast compact model parameter extraction with minimum non-linear optimization (see e.g.…”

Silicon technology tradeoffs for radio-frequency/mixed-signal "systems-on-a-chip"

“…Both the OIP2 and OIP3 results cited above demonstrate that the "ideal" bipolar transistor-defined as one with very low junction capacitances and hence nearly constant -will have outstanding high-frequency linearity and that this intrinsic linearity can improve with future device scaling. As the devices scale to higher , avalanche breakdown in the collector region becomes a significant factor and can also have a deleterious effect on linearity, and this has been examined in several recent papers [70], [71].…”