Bidirectional Synaptic Operations of Triple‐Gated Silicon Nanosheet Transistors with Reconfigurable Memory Characteristics

Abstract

In this study, a triple‐gated transistor with a p+‐i‐n+ silicon nanosheet (NS) is proposed as a single synaptic device, and bidirectional synaptic functions are realized using reconfigurable memory characteristics. The triple‐gated NS transistor features steep switching and bistable characteristics with a subthreshold swing below 5 mV dec−1 and an ON/OFF current ratio of ≈5 × 106 for both the n‐ and p‐channel modes. This transistor exhibits electrically symmetric reconfigurable memory characteristics with an ON current ratio of 1.02 for the n‐ and p‐channel modes. Moreover, the bidirectional synaptic weight updates of binarized spike‐timing‐dependent plasticity learning are successfully performed in a single transistor. This study demonstrates the potential of a triple‐gated NS transistor for achieving compact synaptic arrays in large‐scale silicon‐based neuromorphic computing systems.