BEOL Compatible Superlattice FerroFET-based High Precision Analog Weight Cell with Superior Linearity and Symmetry

Parallel synaptic design of ferroelectric tunnel junctions for neuromorphic computing

“…In addition, tunneling based electron transport mechanisms in such devices endow them with a higher resistance regime than the filamentary memristive devices. Accordingly, among all the nonvolatile memories studied as memristive synapses, such as resistive switching memories, spintronic memories, phase change memories and devices based on FE materials [8][9][10][11][12][13][14][15][16][17][18][19][20][21], ferroelectric tunnel junction (FTJ) is an attractive candidate due to its non-filamentary nature, high-endurance and relatively high resistance and low current [22][23][24][25].…”

A 3D Vertical-Channel Ferroelectric/Anti-Ferroelectric FET With Indium Oxide

“…Previous works theoretically and experimentally show that shorter gate length (Lg) and thinner channel help to mitigate the weak erase issue by enhancing the electric field in the Fe-HfO2 layer [8][9][10]. For 3D vertical channel FeFETs, OS channel material should be conformally deposited by atomic layer deposition (ALD) in a high-aspect ratio trench structure [11][12][13][14].…”

Demonstration of Multiply-Accumulate Operation With 28 nm FeFET Crossbar Array

“…The impact of ∆Id D2D increases with scaling and the memory array size [3,16]. Although multi-level FeFETs have been demonstrated recently [15,17,18], they were limited to a standalone device, and in some cases, the reported channel current necessitates very complex and expensive read circuits. Previously, an effective reduction of ∆Id D2D on a 300mm wafer was reported by shunting an external resistor at the drain terminal of the FeFETs [16].…”