Benchmarking process integration and layout decomposition of directed self-assembly and self-aligned multiple patterning techniques

Abstract

In this paper, we present a benchmarking study of directed self-assembly (DSA) and self-aligned multiple patterning (SAMP) techniques for potential applications in manufacturing 10-nm (half-pitch) IC devices. Using the self-aligned quadruple patterning (SAQP) process as an example, we compare their process characteristics and complexity/costs, identify the integration challenges, and propose various patterning solutions for both BEOL and FEOL applications. Major differences in DSA and SAQP mask strategy, layout decomposition algorithm, and pattern-generation modeling are discussed, and critical requirements of overlay accuracy and CD control for implementing a DSA process in NAND wordline patterning are indentified. DSA technique is found to be a complementary solution for certain niche applications and we suggest that our industry should allocate more R & D resources to solve the 2-D SAMP layout decomposition challenges for logic BEOL patterning. We also propose an "out-of-the-box" idea of combining DSA and SADP process to significantly improve the 2-D design flexibility and develop a layout decomposition algorithm for this hybrid process.