Behavior of analog MOS integrated circuits at high temperatures

Hosticka, B.J.; Dalsass, Karl-Gunther; Krey, D.; Zimmer, G.

doi:10.1109/jssc.1985.1052402

Cited by 13 publications

(2 citation statements)

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“…These include decreased carrier mobility, decreased threshold voltage and exponentially increasing junction-to-substrate (reverse-biased diode) leakage current [4], [18], [19].…”

Section: Cmos Circuit Design At High Temperaturementioning

confidence: 99%

“…In the absence of good high-temperature simulator models, it is possible to use simple hand calculations to determine the expected variation in analog parameters [19], [22]. For architectures which are generally robust to gross impairments (such as loss of amplifier open-loop gain), this provides an alternative design flow.…”

Section: Cmos Circuit Design At High Temperaturementioning

confidence: 99%

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A 14-bit high-temperature ΣΔ modulator in standard cmos

Davis¹,

Finvers²

2003

IEEE J. Solid-State Circuits

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Experimental verification is given for the use of 61 modulation for high-temperature applications ( approximately 150 C) in a standard CMOS process. Switched-capacitor circuits are used to implement a second-order single-stage and a third-order 2-1 MASH 61 modulator with single-bit quantization. The two modulators have an oversampling ratio of 256 with an input signal bandwidth of 500 Hz. The modulators were fabricated in a 1.5-m standard CMOS technology. A fully differential signal path and near minimum sized switches are used to mitigate the effect of large junction-to-substrate leakage current present at high temperatures. Experimental results show both modulators are capable of over 14 bits of resolution at 225 C and over 13 bits of resolution at 255 C. Results show that the single-stage modulator is more resistant to high-temperature circuit impairment than is the MASH cascaded structure.

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“…These include decreased carrier mobility, decreased threshold voltage and exponentially increasing junction-to-substrate (reverse-biased diode) leakage current [4], [18], [19].…”

Section: Cmos Circuit Design At High Temperaturementioning

confidence: 99%

Section: Cmos Circuit Design At High Temperaturementioning

confidence: 99%