2014 IEEE 26th International Symposium on Power Semiconductor Devices &Amp; IC's (ISPSD) 2014
DOI: 10.1109/ispsd.2014.6856006
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Behavior modeling for whole-chip HV ESD protection circuits

Abstract: This paper reports a new behavioral modeling technique for HV diode and silicon controlled rectifier (SCR) based electrostatic discharge (ESD) protection structures using Verilog-A language. Accurate models were developed for various HV ESD diode and stacked SCR power clamp implemented in a foundry BCD30V process, which were validated by circuit simulation and ESD measurement.

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Cited by 7 publications
(1 citation statement)
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“…PA Juliano et al proposed a method for modeling the circuit behavior of controllable silicon devices, enabling the simulation of conventional unidirectional SCR devices [7]. Li et al proposed a modeling method based on Verilog-A behavioral language that can be applied to different types of ESD devices, while addressing issue [8]. However, these models, due to their lack of consideration for the gate's effect, exhibit significant errors when simulating devices with gates.…”
Section: Introductionmentioning
confidence: 99%
“…PA Juliano et al proposed a method for modeling the circuit behavior of controllable silicon devices, enabling the simulation of conventional unidirectional SCR devices [7]. Li et al proposed a modeling method based on Verilog-A behavioral language that can be applied to different types of ESD devices, while addressing issue [8]. However, these models, due to their lack of consideration for the gate's effect, exhibit significant errors when simulating devices with gates.…”
Section: Introductionmentioning
confidence: 99%