2020
DOI: 10.1007/s10845-020-01680-0
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Bayesian network for integrated circuit testing probe card fault diagnosis and troubleshooting to empower Industry 3.5 smart production and an empirical study

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Cited by 25 publications
(3 citation statements)
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“…This problem is also known as circuit synthesis or circuit inverse design in the literature. Fault diagnosis [52] Belief network Contact resistance Results of 3 logged trails matched with the expected [53] BNN Differential amplifier < 1% prediction error over 60% test cases [185] BNN + preprocessing Analog filter 96% correct classification of test data [48] Bayes' theorem Two-stage Op-Amp 86% of process/layout faults diagnosed [186] Belief network ISCAS'89 benchmark circuits Transient error diagnosed [187] Belief network Chipset assembly, test factory Good agreement with real data [188] Belief network Etch equipment 4 out of 5 faults identified correctly [189] Belief network A wafer dataset Over 90% accuracy in most cases [190] Gibbs sampling 20 lots of 500 wafers Smaller error compared to baselines [191] Variational Bayes Chaotic circuit, Op-Amp filter > 1% ↑ accuracy compared to baselines [192] Naive Bayes classifier Chaotic circuit, Op-Amp filter 0.2%, 2.5%, 3.2% ↑ accuracy compared to baselines [193] Belief network Probe card About 3× accuracy improvement and 64% cost reduction Reliability analysis [184] MAP A lithography tool Test length shortened [194] PTM logic circuits > 5% ↑ reliability improved [195] Bayes' theorem 1 logic circuits < 12% ↓ error compared to MC w/ less run-time [196] Belief network CMOS gates Better accuracy compared with one baseline [197] Belief network 5 logic circuits > 2% ↑ accuracy compared to baselines [198] MAP HV circuit breaker Reliability value obtained [199] Belief network 2 ISCAS'85 benchmark circuits Faster and more accurate compared to exact inference [200] Belief network ZPW-2000A track circuits Reliability value obtained [201] Belief network Microprocessors More accurate FIT compared to FI w/ 65% ↓ run-time [202] Belief network COTS devices Failure rate calculated Process control [55] Empirical Bayes Printed circuit board Deployed in AT&T factories [54] MAP VLSIC process Detection time reduced for a multi-stage process [203] Particle filter CMP process (MRR prediction) 13% ↑ improvement compared to baselines [204] Particle filter CMP process (end-po...…”
Section: A Schematic-level Circuit Optimizationmentioning
confidence: 99%
“…This problem is also known as circuit synthesis or circuit inverse design in the literature. Fault diagnosis [52] Belief network Contact resistance Results of 3 logged trails matched with the expected [53] BNN Differential amplifier < 1% prediction error over 60% test cases [185] BNN + preprocessing Analog filter 96% correct classification of test data [48] Bayes' theorem Two-stage Op-Amp 86% of process/layout faults diagnosed [186] Belief network ISCAS'89 benchmark circuits Transient error diagnosed [187] Belief network Chipset assembly, test factory Good agreement with real data [188] Belief network Etch equipment 4 out of 5 faults identified correctly [189] Belief network A wafer dataset Over 90% accuracy in most cases [190] Gibbs sampling 20 lots of 500 wafers Smaller error compared to baselines [191] Variational Bayes Chaotic circuit, Op-Amp filter > 1% ↑ accuracy compared to baselines [192] Naive Bayes classifier Chaotic circuit, Op-Amp filter 0.2%, 2.5%, 3.2% ↑ accuracy compared to baselines [193] Belief network Probe card About 3× accuracy improvement and 64% cost reduction Reliability analysis [184] MAP A lithography tool Test length shortened [194] PTM logic circuits > 5% ↑ reliability improved [195] Bayes' theorem 1 logic circuits < 12% ↓ error compared to MC w/ less run-time [196] Belief network CMOS gates Better accuracy compared with one baseline [197] Belief network 5 logic circuits > 2% ↑ accuracy compared to baselines [198] MAP HV circuit breaker Reliability value obtained [199] Belief network 2 ISCAS'85 benchmark circuits Faster and more accurate compared to exact inference [200] Belief network ZPW-2000A track circuits Reliability value obtained [201] Belief network Microprocessors More accurate FIT compared to FI w/ 65% ↓ run-time [202] Belief network COTS devices Failure rate calculated Process control [55] Empirical Bayes Printed circuit board Deployed in AT&T factories [54] MAP VLSIC process Detection time reduced for a multi-stage process [203] Particle filter CMP process (MRR prediction) 13% ↑ improvement compared to baselines [204] Particle filter CMP process (end-po...…”
Section: A Schematic-level Circuit Optimizationmentioning
confidence: 99%
“…In network management, troubleshooting is one of the important and difficult tasks [1][2]. Fault diagnosis is a process of finding the root cause of a fault based on the observed events and generally consists of three steps: fault detection, fault location, and testing [3][4]. Fault detection determines whether a fault exists in the network based on the signs of failure.…”
Section: Introductionmentioning
confidence: 99%
“…By applying the Bayesian network method, domestic and foreign scholars have made certain research achievements. Fu et al applied it to fault diagnosis and elimination of integrated circuit test probes [25], Wang et al applied it to scenario analysis under the cognitive uncertainty of scientific and technological accidents [26], and Cao applied it to personal credit evaluation. To predict the default risk of future borrowers [27], Wang et al applied it to predict the probability of technological progress to get the path of technological optimization [28], Li et al combined it with the explanatory structure model to build the risk identification and early warning model of social media network public opinion under emergencies [29], Bai et al combined it with the rough set theory.…”
Section: Introductionmentioning
confidence: 99%