Basics on Delta-Sigma Converters

Abstract

Industrial applications often require a high resolution and performance from an analog-to-digital converter at a moderate speed (see Chap. 1), so that SAR ADCs (Chaps. 2 and 3) and delta-sigma ADCs are most commonly used. This chapter will therefore concentrate on the basics of delta-sigma converters and then on the discrete-time approach utilizing the switched-capacitor technique, which is most commonly used. The alternative continuous-time architecture will be discussed in Chap. 5.Delta-sigma converters were already introduced in Chap. 1. The analog signal A is coupled to a filter with feedback-loop as illustrated again in Fig. 4.1.The quantizer, which in Fig. 4.1 is a comparator, is placed within a regulationloop, resulting in the transfer function of Eq. (1.21):The quantization noise N is suppressed within the low frequency signal band and the remaining high frequency noise is suppressed by a digital low-pass filter. This way, the delta-sigma converters achieve the best signal-to-noise ratios [1]. ΔΣ ADCs can convert signals with low signal frequency with high resolution. The oversampling and the digital low-pass filtering will even suppress higher frequency noise of the signal. Such signals occur often in industrial applications that use sensors. Examples are pressure or temperature sensors, flow or energy meters. Additionally, the analog filter provides a linear transfer function. Consequently, the differential non-linearity is extremely good. However, non-linear parameters of the electrical circuitry will still cause an integral non-linearity.Further disadvantages are the low conversion rates caused by the required oversampling, the time delay caused by the digital filter and the fact that snapshots are not possible as the delta-sigma converter has to run continuously and synchronously with the clock.

IMPEC: An Integrated System for Monitoring and Processing Electricity Consumption in Buildings

“…Contrary to Successive-Approximation-Register (SAR) ADCs (housed in NI 9203 nodule), Delta-Sigma (∆Σ) ADCs (housed in NI 9242 and NI 9239 modules) implement several additional components for oversampling, decimation filtering, and quantization noise shaping to achieve high resolution and excellent anti-aliasing filtering. The decimation filtering process, which averages and down samples data to produce an n-bit sample at a desired sampling rate, introduces a delay before the input signal is converted to a digital signal [32]. To mitigate this problem, a digital compensation method can be implemented.…”