Barrier roughness effects in resonant interband tunnel diodes

Abstract

Peak current densities of InAs/AlSb/GaSb/AlSb/InAs resonant interband tunneling diodes ͑RITD͒ grown by molecular beam epitaxy have been measured as a function of the growth temperature. The growth procedures were designed to produce nominally identical AlSb tunneling barriers. The variations observed in the peak current for positive bias are consistent with the barrier on the substrate side of the RITD becoming effectively thicker for diodes grown at high temperatures. Plan-view in situ scanning tunneling microscopy ͑STM͒ measurements indicate that smoother AlSb barriers are grown at high temperature. The growth temperature dependence of the peak current density and STM results are consistent, because tunneling is highly dependent on barrier thickness. While the high and low temperature growths were designed to have the same barrier thickness, the large current flowing through the thin areas of a rough barrier result in an effectively thinner barrier compared to the smooth one.

Dependence of the electrical and optical properties on growth interruption in AlAs/In0.53Ga0.47As/InAs resonant tunneling diodes

“…Monolayer [ML] fluctuations in tunnel barrier thickness are expected to be important because it is necessary to use tunnel barriers only a few ML thick to obtain the high-peak current densities required for high-speed devices. There have been many theoretical discussions on the importance of surface roughness and interface scattering mechanisms that contribute to peak and valley currents in (In, Ga)As/AlGaAs RTDs and AlSb/InAs RITDs [4-6]. On the experimental sides, there have been reports aimed at linking barrier roughness measured by scanning tunneling microscopy or photoluminescence [PL] spectrum [7,8].…”

Time‐to‐breakdown characteristics of magnetic tunnel junctions

“…Because the tunneling probability increases exponentially with decreasing barrier thickness, the thinner parts than the average thickness of a barrier will carry more current than expected based on the design and thicker parts will carry less. And then, the net result would be a higher current than expected, with the barrier appearing thinner than anticipated based on the growth conditions [5]. Therefore, it seems that the breakdown sites are probably related to some weak spots or pinholes where the oxide thickness is smaller than the average thickness.…”

AlAs-in-AlSb digital alloy superlattice morphology versus growth temperature

“…For unstrained, binary III-V semiconductors, layer-by-layer growth is generally promoted by a higher growth temperature for which both the adatom and vacancy mobility are highest. For example, a study of the effect of AlSb surface morphology within InAs/AlSb/GaSb resonant interband tunnel diodes found that variations in the peak current were an artifact of AlSb surface roughness, which decreased with increasing growth temperature [6]. Although higher growth temperatures may promote layer-by-layer growth in many cases, competing thermodynamic effects may come into play as the temperature is increased, particularly when strain is present or when alloys or interfaces are involved.…”