Bandwidth Enhancement of On-Chip Transformers Using Negative Capacitance

In this paper, we present a study on a transformer-based impedance matching network. We use a simplified transformer model comprising two magnetically coupled coils, which are driven by a source and terminated by a load. The formulae of the load and the source impedance for conjugate matching of both sides of the transformer are presented, and a figure of merit is proposed for the evaluation of the power transfer efficiency of the transformer under conjugate matching conditions. Analytical expressions are provided for constructing the widely used transformer network consisting of a resistive load and a parallel tuning capacitor. To verify the proposed work, we examined various on-chip transformers implemented in 0.18 µm CMOS technology. Simulation and measurement results for a matching network synthesized using the aforementioned analytical expressions corresponded well with the result of analysis for operating frequencies up to 72% of the self-resonant frequency of the transformer. The presented results confirm that the proposed analytical formulae based on the simplified transformer model are useful for the design and optimization of transformer-based impedance matching networks in the microwave and millimeter-wave regimes.

show abstract

“…+1) is sufficiently higher than unity. By applying C topt in (15) to (11), we obtain X eqopt , which differs from −ωL 2 used in Fig. 7(b).…”

Section: B Calculation Of Optimal Load and Source Impedances For A Gmentioning

confidence: 99%

“…By replacing the calculated values from (11) with the corresponding quantities in (10), the power efficiency can be expressed as a function of R eq and X eq . However, R eq is a function of X eq when C t is tuned for fixed R L .…”

Section: B Calculation Of Optimal Load and Source Impedances For A Gmentioning

confidence: 99%

Theory and Design of Impedance Matching Network Utilizing a Lossy On-Chip Transformer

Trinh

Park

2019

IEEE Access

View full text Add to dashboard Cite

show abstract

“…The stack transformer [1,4,7], shown in Figure 8, is chosen because of its higher theoretical coupling, which means that, compared with the tapped transformer [8,9], the stack transformer can transmit signal to the secondary side more effectively. However, the stack transformer still has shortcomings.…”

Section: Stack Transformermentioning

confidence: 99%

“…However, Zener diode threshold voltage and low threshold NMOS cannot be regarded as zero. In the formula (7), VIN is the amplitude of the RF oscillation signal, VT is the threshold voltage, and N is the series of voltage multiplier in cascaded capacitor.…”

Section: Full Wave Rectifier (Voltage Multiplier)mentioning

confidence: 99%

Development of Miniaturized Monolithic Isolated Gate Driver

Kuo¹,

Lin²

2021

Adv. sci. technol. eng. syst. j.

View full text Add to dashboard Cite

Gate driver has been applied in many ways, exemplified by that, by using the DC-isolated and AC-pass characteristics of gate driver's primary and secondary sides, the problem of floating endpoint in semiconductor power switch can be solved. However, the conventional design of isolated gate driver provides circuit voltage blocking by optically coupled components. Due to the need for optoelectronic conversion, it requires III-VI semiconductor process and non-standard CMOS process, and the cost is always high. Therefore, in order to better solve the above mentioned problem, an electronic isolated gate driver is proposed. It employs an on-chip transformer to provide voltage isolation between the primary and secondary sides of the circuit, and converts the control signal in the circuit into a highfrequency modulated signal, which in the secondary side is then demodulated by the rectifier through the on-chip transformer to produce the original control signal. The miniaturized isolated gate driver proposed herein adopts TSMC T25HVG2 process and uses an on-chip transformer design in lieu of an optically coupled components. As the amplitude shift keying, on-chip transformer, full-wave quadruple rectifier and data buffer amplifier involved in this design are all integrated on the same chip, the integration can be improved. The size can be smaller than the generally separating electronic isolated gate driver, with the interference from external noise being reduced. In addition, the proposed gate driver generates large signals, in terms of chip layout, therefore, the circuit is put inside the on-chip transformer, which can further save area.

show abstract

“…Using negative capacitance (NCAP) to compensate the coupling capacitance between the primary and secondary metal coils has also been shown to improve the high frequency response of on-chip transformer. The results showed the f SR value of up to 15.5 GHz, with a return loss of less than −10 dB [69].…”

Section: On-chip Transformers Based On Standard Ic Process Flowmentioning

confidence: 99%

Integrated On-Chip Transformers: Recent Progress in the Design, Layout, Modeling and Fabrication

Bajwa

Yapıcı

2019

Sensors

View full text Add to dashboard Cite

On-chip transformers are considered to be the primary components in many RF wireless applications. This paper provides an in-depth review of on-chip transformers, starting with a presentation on the various equivalent circuit models to represent transformer behavior and characterize their performance. Next, a comparative study on the different design and layout strategies is provided, and the fabrication techniques for on-chip implementation of transformers are discussed. The critical performance parameters to characterize on-chip transformers, such as the Q-factor, coupling factor (k), resonance frequency (fSR), and others, are discussed with reference to trade-offs in silicon chip real-estate. The performance parameters and area requirements for different types of on-chip transformers are summarized in tabular form and compared. Several techniques for performance enhancement of on-chip transformers, including the different types of micromachining and integration approaches stemming from MEMS (microelectromechanical systems) technologies are also analyzed. Lastly, the different uses and applications of on-chip transformers are discussed to highlight the evolution of on-chip transformer technology over the recent years and provide directions for future work in this field.

show abstract

Bandwidth Enhancement of On-Chip Transformers Using Negative Capacitance

Cited by 4 publications

References 10 publications

Theory and Design of Impedance Matching Network Utilizing a Lossy On-Chip Transformer

Theory and Design of Impedance Matching Network Utilizing a Lossy On-Chip Transformer

Development of Miniaturized Monolithic Isolated Gate Driver

Integrated On-Chip Transformers: Recent Progress in the Design, Layout, Modeling and Fabrication

Contact Info

Product

Resources

About