Bandwidth-based Application-Aware Multipath Routing for NoCs

Zhang

Proceedings of the 2021 Great Lakes Symposium on VLSI

et al. 2021

Network-on-chip (NoC) is a promising solution to connect more than hundreds of processing elements (PEs). As the number of PEs increases, the high communication latency caused by the burst traffic hampers the speedup gained by computation acceleration. Although parallel multipath transmission is an effective method to reduce transmission latency, its advantages have not been fully exploited in previous works, especially for emerging point-to-point NoCs since: (i) Previous static message splitting strategy increases contentions when traffic loads are heavy, degrading NoC performance. (ii) Only limited shortest paths are chosen, ignoring other possible paths without contentions. (iii) The optimization of hardware that supports parallel multipath transmission is missing, resulting in additional overhead. Thus, we propose a software and hardware collaborated design to reduce latency in point-to-point NoCs through parallel multipath transmission. Specifically, we revise hardware design to support parallel multipath transmission efficiently. Moreover, we propose a reinforcement learning-based algorithm to decide when and how to split messages, and which path should be used according to traffic loads. Experiments show that our algorithm achieves a remarkable performance improvement (+12.1% ∼ +21.0%) when compared with the state-of-the-art dual-path algorithm. Also, our hardware decreases power and area consumption by 23.2% and 10.3% over the dual-path hardware.

Section: Background and Motivationmentioning

confidence: 99%

Parallel Multipath Transmission for Burst Traffic Optimization in Point-to-Point NoCs

Zhang

Proceedings of the 2021 Great Lakes Symposium on VLSI

et al. 2021

“…To reduce network congestion and traffic hotspots, the multipath transmission strategy has been proposed. In [18], [19], [20], [21], load balance is maintained by choosing an alternative contention-free path. In [18], the in-order problem is addressed using additional buffer and stall cycles, increasing energy and area consumption as well as end-to-end latency.…”

Section: Introductionmentioning

confidence: 99%

LAMP: Load-Balanced Multipath Parallel Transmission in Point-to-Point NoCs

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Luo

et al. 2022

Network-on-Chip (NoC) is an emerging paradigm that is able to connect a significant amount of processing elements (PEs). However, as a distributed sub-system, NoC resources have not been exploited to the fullest. Multipath parallel transmission, which splits one message into multiple parts and sends them simultaneously, shows its efficiency in utilizing NoC resources and further reducing the transmission latency. However, this method is not fully optimized in previous works, especially for emerging point-to-point NoCs due to the following reasons: (i) only limited shortest paths are chosen; (ii) static message splitting strategy without considering NoC utilization state increases contentions;(iii) the optimization of hardware that supports multipath parallel transmission is missing, resulting in additional overheads. Thus, we propose LAMP, a software and hardware collaborated design to efficiently utilize resources and reduce latency in point-to-point NoCs through the load-balanced multipath parallel transmission. Specifically, we propose a reinforcement learning-based algorithm to decide when and how to split messages, and which path should be used according to traffic loads. Also, the temporal and spatial load-balancing algorithms are proposed so that the message size is adjusted properly to utilize NoC resources. Moreover, we revise the hardware design to support multipath parallel transmission efficiently. Extensive experiments show that our algorithm achieves a remarkable performance improvement (+18.0% ∼ +29.9%) when compared with the state-of-the-art dual-path algorithm. Our hardware design decreases power and area consumption by 23.2% and 10.3% over the dual-path hardware.

“…To reduce network congestion and traffic hotspots, the multipath transmission strategy has been proposed. In [66][67][68][69], load balance is maintained by choosing an alternative contention-free path. In [66], the in-order problem is addressed using additional buffer and stall cycles, increasing energy and area consumption as well as end-to-end latency.…”

Section: Multipath Transmissionmentioning

confidence: 99%

Hardware-software co-design and optimization for point-to-point network-on-chip based many-core systems

Chen¹

Minimization in Emerging SMART NoC via Direct and Indirect Routes." in IEEE Transactions on Computers (TC). 2021 The contributions of the co-authors are as follows: I would like to express my sincere appreciation and gratitude to many people for all they have done to support me as a Ph.D. student in the past few years. Currently, the COVID-19 situation is still fluid. But I believe all of us will emerge from it. Firstly, I am deeply indebted to Prof. Weichen Liu, my supervisor, whose outstanding research talents and professional teaching attitudes have encouraged me to begin this challenging but interesting Ph.D. journey. He is always patient, responsible, and extremely wise. Rather than limiting the research topic to a specific area, he has inspired me to find new problems and try creative methods to solve them. He has taught me ways to conduct comprehensive research with careful reasoning and techniques to present novel works with decent examples. It is a great honor to benefit from his personality and diligence. I would like to extend my appreciation to Thesis Advisory Committee (TAC) members: Prof. Xueyan Tang and Dr. Tao Luo. They have supported and encouraged me a lot.