Balance-Compensated Asymmetric Marchand Baluns on Silicon for MMICs

Yang, Geliang; Wang, Zhigong; Li, Zhiqun; Li, Qin; Liu, Faen

doi:10.1109/lmwc.2014.2313719

Cited by 11 publications

(20 citation statements)

References 8 publications

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“…However, the imbalances can arise from either inherent device limitations or some external factors that are mainly related to physical design. Therefore, more degrees of design freedom are desired for imbalance compensation . Unlike in Ref.…”

Section: Analysis and Designmentioning

confidence: 99%

“…Unlike in Ref. , a shorted capacitor has been added in series with the float port of the Marchand balun. The function of the capacitor can be derived as follows.…”

Section: Analysis and Designmentioning

confidence: 99%

“…Therefore, more degrees of design freedom are desired for imbalance compensation. 6 ð1Þ in which, x = (1-k 2 ) 1/2 , y = jksinθ, z = (1-k 2 ) 1/2 cosθ + jsinθ. k is the coupling factor.…”

Section: Analysis and Designmentioning

confidence: 99%

“…We have focused on balance compensation techniques for millimeter‐wave baluns in Refs. . Here in this letter, a CMOS UWB balun with capacitive balance compensation technique is proposed.…”

Section: Introductionmentioning

confidence: 99%

“…The 3.1-10. 6 GHz spectrum with capability of high data-rate communication has attracted extensive attentions in both research and industry. Baluns are usually employed to satisfy the requirement of balance-to-unbalance conversions to the design of balanced mixer and push-pull amplifier.…”

Section: Introductionmentioning

confidence: 99%

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3.6‐8.1 GHz CMOS balun with 1.8° in‐band phase difference by using capacitive balance compensation technique

Yang

Tang

Wang

2020

Micro & Optical Tech Letters

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In this letter, a passive ultra‐wideband balun with high balance performance is proposed. The balun is realized by using a pair of planar spiral coupled transmission lines and a capacitor which is responsible for the capacitive balance compensation. The straight‐forward scattering matrix derivation shows that the proposed structure can achieve full output balances both in amplitude and phase. For demonstration, two baluns with and without the compensating capacitor were designed and fabricated in a 65‐nm complementary metal‐oxide‐semiconductor (CMOS) process. The measured results show that the compensated balun features a measured insertion loss ≤5.2 dB and a return loss ≥10 dB from 3.6 to 8.1 GHz. Within such a wide frequency range, the measured amplitude and phase difference are ≤0.2 dB and 1.8°, respectively, which are much better than its uncompensated counterpart.

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Section: Analysis and Designmentioning

confidence: 99%

“…Unlike in Ref. , a shorted capacitor has been added in series with the float port of the Marchand balun. The function of the capacitor can be derived as follows.…”

Section: Analysis and Designmentioning

confidence: 99%

Section: Analysis and Designmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

3.6‐8.1 GHz CMOS balun with 1.8° in‐band phase difference by using capacitive balance compensation technique

Yang

Tang

Wang

2020

Micro & Optical Tech Letters

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A CMOS balun with common ground and artificial dielectric compensations applied in a wideband RF front-end

Yang¹,

Tang

Wang

2022

Microelectronics Journal

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20.8–51 GHz highly balanced CMOS balun

Yang

Wang

2017

Electron. lett.

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An ultra-wideband asymmetric spiral-stacked Marchand balun fabricated in the standard 0.18 μm CMOS process is demonstrated. An innovative technique named in-phase current return path is incorporated into the design to enhance the balun's balance metrics. The proposed balun has a measured insertion loss <5 dB (3 dB for an ideal balun) and a return loss better than 10 dB from 20.8 to 60 GHz. Significantly, it provides a measured amplitude imbalance <0.3 dB and a phase imbalance <2°within 10-51 GHz range. The balun occupies an area of only 0.043 mm 2 without pads. The resultant highly balanced CMOS balun is shown as a high-performing millimetre-wave component suitable for the full Ka and/or Q band applications. Introduction: Balun, which transforms a single-ended signal into two differential signals while maintaining equal signal amplitude, is widely used in antennas, push-pull amplifiers, balanced mixers and filters. The transformer based [1] and Marchand type [2-4] baluns with the merits of passive structures, which have no dc consumption and high operating frequencies, are perhaps two of the most prevalent structures for millimetre-wave applications. However, the transformer balun in [1] suffers from inferior performance in terms of insertion loss (IL) and return loss (RL) even though the 3.4 μm-thick top metal is used. A co-planar spiral-type Marchand balun with a slot pattern ground has been demonstrated in the standard 0.18-μm CMOS process [2]. The balun features an IL of 5 dB, an RL of 10 dB, a phase difference (PD) <5°and an amplitude difference (AD) <1 dB within a relative low-frequency range from 18.4 to 32.2 GHz. The bandwidth can be further extended using the broadside-coupled structures, which were exploited by Chiou et al. [3]. In [3], an asymmetric stacked balun was implemented by meander lines with a larger frequency range from 16.5 to 67 GHz. Nevertheless, the drawbacks are obvious that it has a relative high in-band IL of 7 dB, a PD of 5°and an AD of 1 dB, respectively. In our previous work [4], two asymmetric spiral-stacked baluns were developed with both amplitude and phase balance compensated. The measured results show that both of the baluns have a reduced PD of 2.5°, but without AD improvement. Here in this Letter, a new dual-asymmetric spiral-stacked Marchand balun is developed with the in-phase current return path (CRP) technique specifically for balance enhancement. The resultant balun achieves a superior performance of AD <0.3 dB and PD <2°within an ultra-wideband (UWB) from 10 to 51 GHz.

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Balance-Compensated Asymmetric Marchand Baluns on Silicon for MMICs

Cited by 11 publications

References 8 publications

3.6‐8.1 GHz CMOS balun with 1.8° in‐band phase difference by using capacitive balance compensation technique

3.6‐8.1 GHz CMOS balun with 1.8° in‐band phase difference by using capacitive balance compensation technique

A CMOS balun with common ground and artificial dielectric compensations applied in a wideband RF front-end

20.8–51 GHz highly balanced CMOS balun

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