BADCO: Behavioral Application-Dependent Superscalar Core model

Abstract

Abstract-Microarchitecture research and development rely heavily on simulators. The ideal simulator should be simple and easy to develop, it should be precise, accurate and very fast. But the ideal simulator does not exist, and microarchitects use different sorts of simulators at different stages of the development of a processor, depending on which is most important, accuracy or simulation speed. Approximate microarchitecture models, which trade accuracy for simulation speed, are very useful for research and design space exploration, provided the loss of accuracy remains acceptable. Behavioral superscalar core modeling is a possible way to trade accuracy for simulation speed in situations where the focus of the study is not the core itself. In this approach, a superscalar core is viewed as a black box emitting requests to the uncore at certain times. A behavioral core model can be connected to a cycle-accurate uncore model. Behavioral core models are built from cycle-accurate simulations. Once the time to build the model is amortized, important simulation speedups can be obtained. We describe and study a new method for defining behavioral models for modern superscalar cores. The proposed Behavioral Application-Dependent Superscalar Core model, BADCO, predicts the execution time of a thread running on a superscalar core with an error less than 10 % in most cases. We show that BADCO is qualitatively accurate, being able to predict how performance changes when we change the uncore. The simulation speedups we obtained are typically between one and two orders of magnitude.

Selecting benchmark combinations for the evaluation of multicore throughput

“…We identified 75 papers that have used fixed multiprogrammed workloads 2 . The vast majority of these 75 papers use a small subset of all possible workloads, ranging from a few workloads to a few hundreds.…”

“…Then, some workload types are defined. For instance, if there are two benchmark classes A and B and two identical cores, 3 types of workloads may be 1 Physical cores may be SMT 2 We do not count the studies using a number of benchmarks small enough for allowing to simulate all the possible workloads. defined: AA, BB and AB.…”

“…Several approximate microarchitecture simulation methods have been proposed [3], [8], [9], [10], [11], [2], [12], [13] (the list is not exhaustive). In general, these methods trade accuracy for simulation speed.…”

“…Zesto is a detailed x86 simulator [1]. BADCO is an approximate simulator for fast uncore simulation [2]. We present BADCO shortly in section IV-B.…”

“…We performed simulations with Zesto, a detailed microarchitecture simulator [1], and with BADCO, a fast approximate simulator [2]. We show that, unless we know a priori that the microarchitecture being assessed significantly outperforms (or underperforms) the baseline microarchitecture, it is not safe to simulate only a few tens of random workloads, as frequently done in many studies.…”