AxleDB: A novel programmable query processing platform on FPGA

Salami, Behzad; Malazgirt, Gorker Alp; Arcas-Abella, Oriol; Yurdakul, Arda; Sönmez, Nehir

doi:10.1016/j.micpro.2017.04.018

Cited by 28 publications

(20 citation statements)

References 27 publications

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“…Recently, hardware accelerators, such as FPGAs and GPUs, have also been considered a viable alternative to modern CPUs for accelerating common relational operators [36,57], including selections [32,72]. FPGAs are either integrated into a datapath between a network and processor to perform database operations [1,65,79], viewed as a co-processor or accelerator [20], or domain-specific processors [21,53,57,69]. Similarly, GPUs have also demonstrated significant speed-up in data processing [12,24,70] by proposing kernel scheduling, algorithms, and data structures to overcome architectural challenges like avoiding thread divergence and offering coalesced memory access pattern.…”

Section: Related Workmentioning

confidence: 99%

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Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads

Budhkar

Absalyamov

Zois

et al. 2019

ACM Trans. Archit. Code Optim.

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Inexpensive DRAMs have created new opportunities for in-memory data analytics. However, the major bottleneck in such systems is high memory access latency. Traditionally, this problem is solved with large cache hierarchies that only benefit regular applications. Alternatively, many data-intensive applications exhibit irregular behavior. Hardware multithreading can better cope with high latency seen in such applications. This article implements a multithreaded prototype (MTP) on FPGAs for the relational selection operator that exhibits control flow irregularity. On a standard TPC-H query evaluation, MTP achieves a bandwidth utilization of 83%, while the CPU and the GPU implementations achieve 61% and 64%, respectively. Besides being bandwidth efficient, MTP is also 14.2× and 4.2× more power efficient than CPU and GPU, respectively.

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Section: Related Workmentioning

confidence: 99%

“…Embedding reconfigurable hardware in storage devices is a growing area of interest [6,33,43,65]. For instance, Ibex [79] is a MySQL accelerator platform where a SATA SSD is coupled with an FPGA.…”

Section: Related Workmentioning

confidence: 99%

Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads

Budhkar

Absalyamov

Zois

et al. 2019

ACM Trans. Archit. Code Optim.

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“…In comparison to traditional general-purpose CPU-based systems, hardware accelerators provide better power, performance, and energy efficiency in various domains such as database processing [35], [36], [37], speech recognition [38], [39], [40], and neural network applications [14], [41]. However, with the rise of the size of data, energy consumption is still a key concern.…”

Section: Related Workmentioning

confidence: 99%

Comprehensive Evaluation of Supply Voltage Underscaling in FPGA on-Chip Memories

Salami

Ünsal

Kestelman

2018

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

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In this work, we evaluate aggressive undervolting, i.e., voltage scaling below the nominal level to reduce the energy consumption of Field Programmable Gate Arrays (FPGAs). Usually, voltage guardbands are added by chip vendors to ensure the worst-case process and environmental scenarios. Through experimenting on several FPGA architectures, we measure this voltage guardband to be on average 39% of the nominal level, which in turn, delivers more than an order of magnitude power savings. However, further undervolting below the voltage guardband may cause reliability issues as the result of the circuit delay increase, i.e., start to appear faults. We extensively characterize the behavior of these faults in terms of the rate, location, type, as well as sensitivity to environmental temperature, with a concentration of on-chip memories, or Block RAMs (BRAMs). Finally, we evaluate a typical FPGA-based Neural Network (NN) accelerator under low-voltage BRAM operations. In consequence, the substantial NN energy savings come with the cost of NN accuracy loss. To attain power savings without NN accuracy loss, we propose a novel technique that relies on the deterministic behavior of undervolting faults and can limit the accuracy loss to 0.1% without any timing-slack overhead.• This paper is the first effort to empirically study aggressive voltage underscaling of FPGAs below the standard nominal level. Through experimenting on four FPGA platforms, we confirm a large guardband, which is measured to be on average 39% of the nominal level for © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

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“…Near-storage processing augments the storage device with a computation offload engine, which both adds computation capacity as well as reduces the data transported over the interconnect. Many previous research have shown great performance benefits, often orders of magnitude improvements over analytics software running purely on the host CPU [9,12,14,18,22,24].…”

Section: Introductionmentioning

confidence: 99%

ColumnBurst

Sun

Jun

2020

Proceedings of the 11th ACM SIGOPS Asia-Pacific Workshop on Systems

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We present ColumnBurst, a memory-efficient, near-storage hardware accelerator for database join queries. While the paradigm of near-storage computation has demonstrated performance and efficiency benefits on many workloads by reducing data movement overhead, memory-bound operations such as relational joins on unsorted data have been relatively inefficient with fast modern storage devices, due to the limited capacity and performance of memory available on the near-storage processing engine. ColumnBurst delivers very high performance even on such complex queries, while staying within the memory performance and capacity budget of what is typically already available on off-the-shelf storage devices. ColumnBurst achieves this via a compact, hardware implementation of sorting-based group-by aggregation and join algorithms, instead of the conventional hash-based algorithms. We evaluate ColumnBurst using an FPGA-based prototype with 1 GB of slow on-device DDR3 DRAM, and show that on benchmarks including TPC-H queries with join queries on unsorted columns, it outperforms MonetDB on a 6-core i7 with 32 GB of DRAM by over 7×, and ColumnBurst using a near-storage hash join algorithm by 2×. CCS CONCEPTS • Information systems → Storage architectures; Join algorithms; • Hardware → Hardware accelerators.

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AxleDB: A novel programmable query processing platform on FPGA

Cited by 28 publications

References 27 publications

Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads

Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads

Comprehensive Evaluation of Supply Voltage Underscaling in FPGA on-Chip Memories

ColumnBurst

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