Avoiding instabilities in power electronic systems: toward an on‐chip implementation

Abstract

The available controller chips for power electronic systems are used for specific transient and steady-state performances. In such systems, the parameter ranges for stable operation are delimited by slow-timescale as well as fast-timescale instabilities. The usual practice is to design the control loop based on the state-space averaging technique, which cannot predict the fast-timescale instabilities. In this paper the first attempt has been made to propose a new design of the controller chip that can suppress these instabilities, thus extending the stable operating range in the parameter space. For this, we make use of the Filippov method which can effectively predict both types of instabilities. In this approach, the stability of the system is obtained in terms of the state transition matrices across each subsystem and saltation matrices across each switching event. The basic idea is to exercise control over the saltation matrices to increase the stability margin of the periodic orbit. Since in the Filippov approach an increase in the number of switching events in a cycle does not increase the complexity of the analysis, the proposed controller chip will be particularly useful in complex power electronic systems such as interconnected converters, multi-input multi-output converters, resonant converters, micro-grids etc.

Analysing the effects due to discontinuous output‐voltage ripple in a digitally current‐mode controlled boost converter

“…Past research efforts in [19][20][21][22][23][24][25][26] have analysed and modelled the fast-scale stability status of CMC. Analytical stability boundary for different types of controllers in CMC is computed in [27][28][29][30].…”

“…3.1.1 Interval-2 sampling: Using 12, (14), and (22) with m c = 0 and t 1 = 0, the current-loop model can be derived, and the perturbed discrete-time current-loop model becomes…”

“…Using (12), (15), and (22) with m c = 0 and t 1 = 0, the perturbed discrete-time current-loop model can be obtained as…”

“…Similarly, using (12), (22), and (41), the perturbed discrete-time voltage-loop model can be derived as…”

Enhancing the Stability of the Switched Systems Using the Saltation Matrix

“…22 In Ref. 23, a controller is proposed that forces the system to have more than two switchings during a period in an attempt to avoid subharmonic behaviors in complex converters; however, as the switching time increases, faster devices are needed and the durability of the elements decreases. Other studies that include both fast scale and slow scale instabilities are reported in Refs.…”