Autotuning FPGA Design Parameters for Performance and Power

Mametjanov, Azamat; Balaprakash, Prasanna; Choudary, Chekuri; Hovland, Paul; Wild, Stefan M.; Sabin, Gerald

doi:10.1109/fccm.2015.54

Cited by 25 publications

(23 citation statements)

References 9 publications

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“…Usually there are detailed synthesis reports available in this software. Using various HDL techniques and optimizations, quality of results can be tracked and increased accordingly (Bian et al 2010;Grewal et al 2017;Mametjanov et al 2015).…”

Section: Quality Estimation Techniquesmentioning

confidence: 99%

Research of Metabolic P System Field Programmable Gate Array Implementation

Kulakovskis¹

2019

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Disertacija rengta 2014-2019 metais Vilniaus Gedimino technikos universitete. Vadovas prof. dr. Dalius NAVAKAUSKAS (Vilniaus Gedimino technikos universitetas, elektros ir elektronikos inžinerija-T 001). Vilniaus Gedimino technikos universiteto Elektros ir elektronikos inžinerijos mokslo krypties disertacijos gynimo taryba: Pirmininkas prof. dr. Vytautas URBANAVIČIUS (Vilniaus Gedimino technikos universitetas, elektros ir elektronikos inžinerija-T 001). Nariai: prof. dr. Algirdas BAŠKYS (Vilniaus Gedimino technikos universitetas, elektros ir elektronikos inžinerija-T 001), prof. habil. dr. Gintautas DZEMYDA (Vilniaus universitetas, informatikos inžinerija-T 007), dr. Ofer HADAR (Negevo Ben-Guriono universitetas, Izraelis, elektros ir elektronikos inžinerija-T 001), prof. dr. Jurij NOVICKIJ (Vilniaus Gedimino technikos universitetas, elektros ir elektronikos inžinerija-T 001). Disertacija bus ginama viešame Elektros ir elektronikos inžinerijos mokslo krypties disertacijos gynimo tarybos posėdyje 2019 m. gegužės 31 d. 13 val. Vilniaus Gedimino technikos universiteto senato posėdžių salėje.

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Section: Quality Estimation Techniquesmentioning

confidence: 99%

Research of Metabolic P System Field Programmable Gate Array Implementation

Kulakovskis¹

2019

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“…InTime builds a database of configurations from a series of preliminary runs and learns to predict the next set of CAD tool options to improve timing results, achieving 30% improvement in timing result compared to vendor-supplied design space exploration tools. The authors in [17] also propose machine learning techniques such as linear regression and random forest to autotune the performance and power consumption of FPGA designs. We note that the learning-based sampling and classification techniques used in InTime [14] and [17] are complementary to our proposal.…”

Section: Related Workmentioning

confidence: 99%

“…The authors in [17] also propose machine learning techniques such as linear regression and random forest to autotune the performance and power consumption of FPGA designs. We note that the learning-based sampling and classification techniques used in InTime [14] and [17] are complementary to our proposal. It is possible to integrate these methods into DATuner as an additional arm in the MAB algorithm.…”

Section: Related Workmentioning

confidence: 99%

A Parallel Bandit-Based Approach for Autotuning FPGA Compilation

Liu

Zhao

et al. 2017

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

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Mainstream FPGA CAD tools provide an extensive collection of optimization options that have a significant impact on the quality of the final design. These options together create an enormous and complex design space that cannot effectively be explored by human effort alone. Instead, we propose to search this parameter space using autotuning, which is a popular approach in the compiler optimization domain. Specifically, we study the effectiveness of applying the multi-armed bandit (MAB) technique to automatically tune the options for a complete FPGA compilation flow from RTL to bitstream, including RTL/logic synthesis, technology mapping, placement, and routing. To mitigate the high runtime cost incurred by the complex FPGA implementation process, we devise an efficient parallelization scheme that enables multiple MAB-based autotuners to explore the design space simultaneously. In particular, we propose a dynamic solution space partitioning and resource allocation technique that intelligently allocates computing resources to promising search regions based on the runtime information of search quality from previous iterations. Experiments on academic and commercial FPGA CAD tools demonstrate promising improvements in quality and convergence rate across a variety of real-life designs.

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“…This is followed by design parameterization, along with constraint and optimisation goal specifications. Lastly, either a set of analytical models are constructed and the design is manually optimised [7], [8] or an automatic tool is used [1], [2], [3]. The manual approach the has advantage of being tailored to a particular problem and making use of designer's experience, while a tool has the advantage of being generic and automated.…”

Section: Introductionmentioning

confidence: 99%

“…Machine learning can be used to tune CAD tools or design parameters for faster optimisation [1], [2]. Bayesian optimisation can be used to treat noise in benchmark outputs [3], allowing parallelism to speedup optimisation time.…”

Section: Introductionmentioning

confidence: 99%

Knowledge Transfer in Automatic Optimisation of Reconfigurable Designs

Kurek

Deisenroth

Luk

et al. 2016

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

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Abstract-This paper presents a novel approach for automatic optimisation of reconfigurable design parameters based on knowledge transfer. The key idea is to make use of insights derived from optimising related designs to benefit future optimisations. We show how to use designs targeting one device to speed up optimisation of another device. The proposed approach is evaluated based on various applications including computational finance and seismic imaging. It is capable of achieving up to 35% reduction in optimisation time in producing designs with similar performance, compared to alternative optimisation methods.

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Autotuning FPGA Design Parameters for Performance and Power

Cited by 25 publications

References 9 publications

Research of Metabolic P System Field Programmable Gate Array Implementation

Research of Metabolic P System Field Programmable Gate Array Implementation

A Parallel Bandit-Based Approach for Autotuning FPGA Compilation

Knowledge Transfer in Automatic Optimisation of Reconfigurable Designs

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