Automating the addition of fault tolerance with discrete controller synthesis

Abstract

Abstract. Discrete controller synthesis (DCS) is a formal approach, based on the same state-space exploration algorithms as model-checking. Its interest lies in the ability to obtain automatically systems satisfying by construction formal properties specified a priori. In this paper, our aim is to demonstrate the feasibility of this approach for fault tolerance. We start with a fault intolerant program, modeled as the synchronous parallel composition of finite labeled transition systems; we specify formally a fault hypothesis; we state some fault tolerance requirements; and we use DCS to obtain automatically a program, having the same behavior as the initial fault intolerant one in the absence of faults, and satisfying the fault tolerance requirements under the fault hypothesis. Our original contribution resides in the demonstration that DCS can be elegantly used to design fault tolerant systems, with guarantees on key properties of the obtained system, such as the fault tolerance level, the satisfaction of quantitative constraints, and so on. We show with numerous examples taken from case studies that our method can address different kinds of failures (crash, value, or Byzantine) affecting different kinds of hardware components (processors, communication links, actuators, or sensors). Besides, we show that our method also offers an optimality criterion very useful to synthesize fault tolerant systems compliant to the constraints of embedded systems, like power consumption.

Synchronous programming of device drivers for global resource control in embedded operating systems

“…The approach is similar to several proposals that have been made in the family of synchronous languages and tools (see, for instance, [Chandra et al 2003], [Girault and Rutten 2009] or [Altisen et al 2003]). …”

Feedback Control as MAPE-K Loop in Autonomic Computing

“…It is extended to handle logico-numeric properties, by replacing, in the modular architecture of the compiler, Sigali with the new tool ReaX [9]. Other previous work related to the synchronous languages involved some separate and partial aspects of the problem, testing the idea in the framework of a more modest specialized language [20], and particular methods and manual application of the techniques [28], and elaborating on the articulation between reactive programs and DCS [55,4,19], as well as application to fault-tolerance [31,25].…”

Synthesizing fault-tolerant programs from deontic logic specifications

“…Moreover, Girault and Rutten [Girault and Rutten, 2009] present a framework for automating the addition of fault-tolerance using Discrete Control Synthesis (DCS). They use labeled transition systems (LTS) to specify the several concurrent parts of the system, where they model different kinds of faults (e.g., processor crash, Byzantine faults, value corruption) by uncontrollable actions in a LTS.…”