Automating design-space exploration

Schätz, Bernhard; Voß, Sebastian; Zverlov, Sergey

doi:10.1145/2744769.2747912

Cited by 15 publications

(2 citation statements)

References 5 publications

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“…Task scheduling in this context has been, e.g., studied in [13]. Design Space Exploration in the ISO 26262 context has been studied in [16] and regards the partitioning of software components to hardware elements. The paper focuses on criticality aspects of software functions (i.e., ASIL level classification).…”

Section: Related Work and Research Areasmentioning

confidence: 99%

Towards Digital Twins for the Description of Automotive Software Systems

Blech

2020

Electron. Proc. Theor. Comput. Sci.

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We present models for automotive software that capture quantitative and qualitative aspects of software systems and the underlying hardware architecture. In particular, we consider different levels of computing power. These range from controllers up to the cloud. We present a modeling approach for software deployment taking different automotive requirements such as criticality, latency, memory, computational resources, and communication into account. Our models capture automotive software and hardware system configurations and can serve as digital twins that are digital counterparts of (usually) physical entities. Furthermore, we highlight connected research areas and challenges.

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Section: Related Work and Research Areasmentioning

confidence: 99%

Towards Digital Twins for the Description of Automotive Software Systems

Blech

2020

Electron. Proc. Theor. Comput. Sci.

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“…However, even these vulnerabilities have not hindered the widespread adoption of FPGAs in safety-critical fields such as avionics, aerospace, automotive, biomedical, financial and cryptographic systems where high reliability, high availability and high assurance are critical requirements. Systems, targeting these application domains are rigorously designed to achieve the required level of hardness-assurance according to industrial standards, for example, ISO26262 [1]. Vendors, also continuously spin-off design tools and methodologies to address the market needs for safety-critical domains.…”

Section: Introductionmentioning

confidence: 99%

Isolation Design Flow Effectiveness Evaluation Methodology for Zynq SoCs

et al. 2020

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Static Random-Access Memory (SRAM)-based Field Programmable Gate Arrays (FPGAs) are increasingly being used in many application domains due to their higher logic density and reconfiguration capabilities. However, with state-of-the-art FPGAs being manufactured in the latest technology nodes, reliability is becoming an important issue, particularly for safety-critical avionics, automotive, aerospace, industrial robotics, medical, and financial systems. Therefore, fault tolerant system design methodologies have become essential in the aforementioned application domains. The Isolation Design Flow (IDF) is one such design methodology that has promising prospects due to its ability to isolate logic design modules at the physical level for fault containment purposes. This paper proposes a methodology to evaluate the effectiveness of the IDF. To do so, reverse engineering is used to enable fault injection on the IDF designs with minimal changes in the bit-stream. This reduces the time needed to inject a fault significantly thus accelerating the evaluation process. Then this methodology is applied to a case study of a single-chip cryptography application on a ZynQ SoC. Specifically, an Advanced Encryption Standard (AES) Duplication With Comparison (DWC) design is physically isolated with IDF and subsequently subjected to frame-level Fault Injection (FI) in the configuration memory.

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Autonomous driving systems hardware and software architecture exploration: optimizing latency and cost under safety constraints

Collin

Siddiqi

Imanishi

et al. 2019

Systems Engineering

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With the recent progress of techniques in computer vision and processor design, vehicles are able to perform a greater number of functions, and are reaching higher levels of autonomy. As the list of autonomous tasks that the car is supposed to perform grows, two design questions arise: how to group these tasks into modules and which processors and data buses should instantiate these modules and their links in the physical architecture. Both questions are linked, as the processing capacity of the processors influences how centralized the architecture can be, and the modularization influences the overall system latency as well. Furthermore, our interest lies in designing architectures that perform the tasks rapidly, while minimizing cost. This multiobjective problem is intractable without architecture exploration and an analysis tool. This paper presents a linear optimization formulation to capture these tradeoffs, and to systematically find relevant architectures with optimal latency and cost. The results show that enforcing all safety constraints on the architecture leads to a worst case increase of 17% in latency and 18% component cost per vehicle.The increase in latency is significant at the scale of human driver reaction times. K E Y W O R D S autonomy, functional allocation, latency, safety, systems architecture 1 Systems Engineering. 2020;23:327-337. c

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Automating design-space exploration

Cited by 15 publications

References 5 publications

Towards Digital Twins for the Description of Automotive Software Systems

Towards Digital Twins for the Description of Automotive Software Systems

Isolation Design Flow Effectiveness Evaluation Methodology for Zynq SoCs

Autonomous driving systems hardware and software architecture exploration: optimizing latency and cost under safety constraints

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