37th International Symposium on Microarchitecture (MICRO-37'04)
DOI: 10.1109/micro.2004.7
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Automatic Synthesis of High-Speed Processor Simulators

Abstract: Microprocessor simulators are very popular in research and teaching environments. For example, functional simulators are often used to perform architectural studies, to fast-forward over uninteresting code, to generate program traces, and to warm up tables before switching to a more detailed but slower simulator. Unfortunately, most portable functional simulators are on the order of 100 times slower than native execution. This paper describes a set of novel techniques and optimizations to synthesize portable f… Show more

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Cited by 35 publications
(21 citation statements)
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“…SyntSim is a synthesis system for functional simulators which uses binary translation to achieve high performance [14]. SyntSim performs static, or off-line, binary translation based on an optional application profile and the application binary.…”
Section: Related Workmentioning
confidence: 99%
“…SyntSim is a synthesis system for functional simulators which uses binary translation to achieve high performance [14]. SyntSim performs static, or off-line, binary translation based on an optional application profile and the application binary.…”
Section: Related Workmentioning
confidence: 99%
“…Direct execution [12] runs portions of the application software on the simulation host processor rather than on an ISS for the target architecture; this requires the host and target architectures to be the same. When the host and target architectures differ, two methods can be used to accelerate the interpretation of target binaries: compiled simulation [1,11,17,20,21] uncompiles target binaries to a highlevel language (usually C or C++) which is then recompiled for the host architecture; dynamic translation [9,10,18] translates target machine instructions into one or more host machine instructions at simulation time. If the embedded software source code is available, it is possible to adopt the recently proposed virtual coprocessor [3] approach in which the source code is automatically instrumented and then compiled for the host architecture.…”
Section: Modeling the Gp Cores Using A Hardware Abstraction Layermentioning
confidence: 99%
“…Spilling VCP variables to TP memory space is chosen, because pointer hazard can also happen when passing a pointer to a function as an argument (it means potential dereferencings may happen in the callee), in which case, the pointer has to be assumed to hold a TP address. The push / pop services PUSH_int and POP_int are used to move the data to and from the TP memory (7). So that variables in VCP memory can be migrated to TP memory temporarily to resolve this ambiguity.…”
Section: Dereferencingmentioning
confidence: 99%
“…Function bar is invoked from foo by directly injected inverse stub (5). The inverse stub of bar invokes bar at TP by mimicking the stack for calling and returning (6), (7). When foo is finished at VCP the rest of the execution is resumed from caller (8).…”
Section: Bidirectional Invocationmentioning
confidence: 99%
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