Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics

Posadas, Héctor; Peñil, Pablo; Nicolás, Alejandro; Villar, Eugenio

doi:10.1016/j.sysarc.2015.07.002

Cited by 9 publications

(4 citation statements)

References 26 publications

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“…A platform description model (PDM) is used to describe the HW/SW platform, which includes all of the details needed to implement communication and deployment codes. Finally, the platform-specific model is created when these two models converge to define how to enable that feature in the HW platform (PSM) [24].…”

Section: Methodology Overviewmentioning

confidence: 99%

A fast prototype for modeling IP cores using in SoC with UML Marte.

Youcef

Rachid

2021

IJCAI

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Section: Methodology Overviewmentioning

confidence: 99%

A fast prototype for modeling IP cores using in SoC with UML Marte.

Youcef

Rachid

2021

IJCAI

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“…For every component in an SDSL model, the C++ code generator creates a C++ base class. Component communications are modeled with C++ virtual functions (services) that are grouped in interface classes [21]. For every interface, the generator creates a base interface class and a remote version for edge deployment.…”

Section: Common Interfacesmentioning

confidence: 99%

QRML: A Component Language and Toolset for Quality and Resource Management

Berg

Camra

Hendriks

et al. 2020

2020 Forum for Specification and Design Languages (FDL)

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“…The designer has to specify the task graph, the architecture template (as a graph), as well as all possible bindings of the nodes in the task graph onto the resources in the architecture template. Finally, eSSYn (Embedded Software SYNthesis) [7] is a software synthesis tool for embedded systems. The system model is made of three sub-models.…”

Section: C++/systemcbased Toolsmentioning

confidence: 99%

HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems

Ciambrone

Muttillo

Pomante

et al. 2018

2018 7th Mediterranean Conference on Embedded Computing (MECO)

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Heterogeneous devices are becoming widely diffused in the embedded system domain, mainly because of the opportunities to increase application execution performance and, at the same time, to substantially reduce energy consumption. In such a context, this work faces the role of HW/SW cosimulators/analysis tools for embedded systems based on heterogeneous parallel architectures. In particular, it presents a SystemC-based tool for functional/timing HW/SW co-simulation and analysis within a reference ESL HW/SW co-design flow. The description of the main features of the tool, the main design and integration issues and an illustrative case study represent the core of the paper.

show abstract

Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics

Cited by 9 publications

References 26 publications

A fast prototype for modeling IP cores using in SoC with UML Marte.

A fast prototype for modeling IP cores using in SoC with UML Marte.

QRML: A Component Language and Toolset for Quality and Resource Management

HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems

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