Automated Visual Inspection of Solder Bumps

Abstract

This paper describes a computer vision technique for automated inspection of solder bumps on leadless chip carriers and metallized wafers for advanced VLSI (very‐large‐scale integration) packaging. It is based on high‐contrast imaging of soldered surfaces against a reflective background using dark‐field illumination for selective enhancement of surface topography. A brightfield image is also used for resolving ambiguities in image understanding. Gray‐scale images are analyzed using vision algorithms to detect topographic discontinuities of soldered surfaces and to identify solder‐bump defects.

Techniques for the Inspection of Flip Chip Solder Bonded Devices

“…10 In many cases, this is not the case, with pad positions at irregular spacing around or across the chip surface. In addition, shaped bonds, designed to minimise the stress within the bond, require solder bonds of differing solder volume, and hence height, to be produced.…”

“…Imaging solder bumps is, however, an easier task as the bond shape should be regular, there are no conflicting devices present and the substrates should be smooth and flat. An automatic visual inspection system operating on solder bonds has recently been described by AT&T, 10 which was developed for their Advanced VLSI Packaging technology, which has solder bumps 100 μm in diameter on 200 μm pitch. This inspection system uses image highlights, generated by darkfield illumination, and aided, in cases of ambiguity, by brightfield illumination.…”

High-speed solder bump inspection system using a laser scanner and CCD camera

“…One of the conventional methods for bump inspection is a surface angle detection proposed by Ray [2], in which bumps are illuminated with a circular lamp. When the bumps are observed from the vertical direction, a bright ring around the bump top can be seen.…”