Automated Bug Detection for High-level Synthesis of Multi-threaded Irregular Applications

Abstract

Field Programmable Gate Arrays (FPGAs) are becoming an appealing technology in datacenters and High Performance Computing. High-Level Synthesis (HLS) of multi-threaded parallel programs is increasingly used to extract parallelism. Despite great leaps forward in HLS and related debugging methodologies, there is a lack of contributions in automated bug identification for HLS of multi-threaded programs. This work defines a methodology to automatically detect and isolate bugs in parallel circuits generated with HLS. The technique relies on hardware/software Discrepancy Analysis and exploits a pattern-matching algorithm based on Finite State Automata to compare multiple hardware and software threads. Overhead, advantages, and limitations are evaluated on designs generated with an open-source HLS compiler supporting OpenMP.

Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications

“…Bambu tackles these problems by introducing a new automated technique for bug identification for HLSbased hardware-generated designs. The methodology compares the HLS-generated hardware execution with the software obtained from the same source code and automatically finds where the discrepancies arise [9].…”