ATPG and Test Compression for Probabilistic Circuits

Yang, Kai-Chieh; Lee, Ming Ting; Wu, Chen-Hung; Li, James Chien-Mo

doi:10.1109/vlsi-dat.2019.8741869

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“…Test compact [15][16] and test compression techniques [17][18][19][20] can be used to reduce the amount of test data and test time. Test compaction technology can reduce the number of test vectors without reducing the fault coverage.…”

Section: Introductionmentioning

confidence: 99%

A Low Power Test Data Compression Scheme for Scan Test

Ye¹

2022

Frontiers in Artificial Intelligence and Applications

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In this paper, an uncertain state filling method is proposed, which can not only effectively reduce the scan shifting power consumption, but also reduce the test time simultaneously for scan test. This method is based on the threshold algorithm of uncertain state filling, which can both reduce weighted transitions metric (WTM) and improve compression efficiency for test vectors. Experiments with ISCAS’89 benchmark circuits show that the proposed algorithm can make a good tradeoff between power consumption and compression efficiency.

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