2015
DOI: 10.1063/1.4917528
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Atomic origin of high-temperature electron trapping in metal-oxide-semiconductor devices

Abstract: MOSFETs based on wide band-gap semiconductors are suitable for operations at high temperature, at which additional atomic-scale processes that are benign at lower temperatures can get activated which results in device degradation. Recently significant enhancement of electron trapping was observed under positive bias in SiC MOSFETs at temperatures higher than 150°C. Here we report first-principle calculations showing that the enhanced electron trapping is associated with thermally activated capturing of a secon… Show more

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Cited by 21 publications
(15 citation statements)
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“…A single kpoint at (1/4, 1/4, 1/4) was used for Brillouin zone sampling during ionic relaxation. 41 Among the candidate defects that were studied, the transition energies associated with the optical levels of In (In i , Cu In , and V In ) agree best with experimental data, E exp = 1.31 eV (950 nm). 42 None of the other candidate defects have transition energies within 0.3 eV of the experimental value (Figure S13).…”
Section: ■ Results and Discussionsupporting
confidence: 55%
See 1 more Smart Citation
“…A single kpoint at (1/4, 1/4, 1/4) was used for Brillouin zone sampling during ionic relaxation. 41 Among the candidate defects that were studied, the transition energies associated with the optical levels of In (In i , Cu In , and V In ) agree best with experimental data, E exp = 1.31 eV (950 nm). 42 None of the other candidate defects have transition energies within 0.3 eV of the experimental value (Figure S13).…”
Section: ■ Results and Discussionsupporting
confidence: 55%
“…The ionic relaxations are converged to 10 –3 eV for the total energy difference between two steps. A single k-point at (1/4, 1/4, 1/4) was used for Brillouin zone sampling during ionic relaxation …”
Section: Resultsmentioning
confidence: 99%
“…This gives the oxygen vacancy the possibility to be extrinsically negatively charged. Moreover, a recent study showed that negatively charged oxygen vacancies in SiO 2 can explain enhanced electron trapping observed in SiC MOSFETs [41]. The defect charging process is described and linked to actual functioning temperature of the device.…”
Section: 𝜀(+𝑞mentioning
confidence: 98%
“…These films are mainly deposited by plasma‐enhanced chemical vapor deposition (PECVD), atomic layer deposition, or sputtering. Although SiO 2 is a good gate insulator in terms of its band offset, the PECVD process introduces many defects in the SiO 2 film, such as oxygen vacancies and hydrogen‐related bonds . The charge traps formed by these defects shift the threshold voltage, reducing the reliability of the device.…”
Section: Introductionmentioning
confidence: 99%