Atomic Layer Deposition of Nanostructured Materials 2011
DOI: 10.1002/9783527639915.ch8
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Atomic Layer Deposition for Microelectronic Applications

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Cited by 9 publications
(11 citation statements)
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“…SrTiO 3 (STO) thin films have been studied for about two decades as one of the promising candidates for the next-generation dielectric of the dynamic random access memory (DRAM) capacitors. With the aid of the atomic layer deposition (ALD) technique, dielectric films with a permittivity of over 100 can be obtained in a three-dimensional structure, which can mitigate the charge loss problem of aggressively shrunken DRAM capacitors. Leskelä’s group first accomplished the ALD growth of STO films with a permittivity of 100. , Thereafter; several other groups joined this research field with various strategies, such as intermixing Sr- and Ti-rich STO or film growth with the aid of plasma energy. , The authors’ group has also focused on the thermal ALD and performance improvement of the STO films since 2005. ,,,, Thermal ALD is a preferred method for growing such dielectric films over the plasma-based processes because of its almost unlimited capability to grow a conformal film in a severely three-dimensional structure. The DRAM capacitor node, whose minimum lateral dimension is as small as 20 nm and whose height is ∼1000 nm, is an example structure, making the aspect ratio as high as ∼50.…”
Section: Introductionmentioning
confidence: 99%
“…SrTiO 3 (STO) thin films have been studied for about two decades as one of the promising candidates for the next-generation dielectric of the dynamic random access memory (DRAM) capacitors. With the aid of the atomic layer deposition (ALD) technique, dielectric films with a permittivity of over 100 can be obtained in a three-dimensional structure, which can mitigate the charge loss problem of aggressively shrunken DRAM capacitors. Leskelä’s group first accomplished the ALD growth of STO films with a permittivity of 100. , Thereafter; several other groups joined this research field with various strategies, such as intermixing Sr- and Ti-rich STO or film growth with the aid of plasma energy. , The authors’ group has also focused on the thermal ALD and performance improvement of the STO films since 2005. ,,,, Thermal ALD is a preferred method for growing such dielectric films over the plasma-based processes because of its almost unlimited capability to grow a conformal film in a severely three-dimensional structure. The DRAM capacitor node, whose minimum lateral dimension is as small as 20 nm and whose height is ∼1000 nm, is an example structure, making the aspect ratio as high as ∼50.…”
Section: Introductionmentioning
confidence: 99%
“…Regarding the latter concerns, atomic layer deposition (ALD) appears well suited as it is a technique to fabricate (ultra) thin films at low temperatures with a thickness controlled at the angstrom level. Based on sequential exposure of the substrate to different precursors reacting with the surface in a self-limited manner, it has already proven to be a technique of choice for microelectronics applications and for fabricating complex nano-/heterostructures. , Due to its high conformability and accuracy, it has been implemented to nanopatterning, in particular for spacer deposition in multiple patterning, using conventional lithography and lift-off techniques . Because ALD is based on sequential self-saturated surface reactions, area-selective deposition (ASD) has also been developed using either activation or deactivation of the surface to favor or inhibit the growth on specific areas.…”
mentioning
confidence: 99%
“…1 Introduction Al-doped TiO 2 (ATO) film is emerging as a promising candidate material for the high-k dielectric layer in the capacitor of the next-generation dynamic random access memory (DRAM) [1][2][3]. This is fundamentally due to the highest k value of rutile-phased TiO 2 film, which has been reported to be as high as 100, among the reported binary oxide films.…”
mentioning
confidence: 99%
“…The weakness of rutile TiO 2 , however, compared with the current ZrO 2 -based DRAM capacitor dielectric layer is its smaller band gap (~3.2 eV) which can invoke the leakage current concern. Doping the rutile TiO 2 with Al greatly mitigated such a problem by increasing the conduction band offset, since Al ions generally work as acceptor centers in rutile TiO 2 , and thereby balance the n-and p-type carriers [4]. This decreased the leakage current by 10 5 -10 6 times at a capacitor voltage of ~0.8 V [4].…”
mentioning
confidence: 99%
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