Atlas

Zang, Xinshi; Wang, Fangzhou; Liu, Jinwei; Wong, Martin D. F.

doi:10.1145/3508352.3549470

Cited by 1 publication

(2 citation statements)

References 13 publications

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“…Traditionally, the routing engines assumed that the cells are fixed. As a result of the two recent ICCAD 2020 [15] and 2021 [16] CAD Contests, a number of academic works started to perform cell movements during the routing stage, such as Starfish [10], Huang et al [17], Zou et al [12], Zhu et al [18], ATLAS [19], and CR&P [11], [20]. These two contests proposed "routing with cell movement" to point out that new routing engines need to be able to move some cells and re-route some nets to optimize the routing solution.…”

Section: Related Workmentioning

confidence: 99%

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ILPGRC: ILP-Based Global Routing Optimization With Cell Movements

Fontana¹,

Aghaeekiasaraee²,

Netto³

et al. 2024

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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The placement and routing steps directly impact the circuit performance, area, power consumption, and reliability. To handle the high complexity of modern circuits, these steps are tackled separately by applying a divide-and-conquer approach. Unfortunately, due to the continuous increase of design rules complexity, the convergence of solutions can suffer from misalignment, and the effects of an unsatisfactory placement will be noticed only during routing when the placement is considered fixed. In this work, we propose the ILPGRC, an Integer Linear Programming (ILP)-based technique that simultaneously moves cells and routes nets to optimize Global Routing. ILPGRC enables the relocation of cells that can lead to routing issues without compromising the quality concerning the number of VIAs, wirelength, and Design Rule Violations (DRVs). We also propose a partitioning strategy named Checkered paneling, which reduces the input size of the ILP model, making this approach scalable. The Checkered paneling strategy enables the execution of multiple ILP models in parallel, providing a speedup for large circuits. Additionally, we propose a GCell cluster-based approach to legalize the solution with minimum disturbance and displacement. We evaluated our technique for the ISPD 2018 and ISPD 2019 Contests circuits within a physical synthesis flow composed of state-of-the-art place and route academic tools. The results after the detailed routing show that ILPGRC can reduce, on average, the number of VIAs by 4.69% with less than 1% impact on wirelength. Additionally, ILPGRC reduces the number of DRVs in most cases with no open nets left.

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Section: Related Workmentioning

confidence: 99%

“…In the end, they moved some cells to their original positions to legalize the maximum number of moved cells imposed by the ICCAD Contest. Zang et al [19] proposed a two-level layer-aware scheme named ATLAS. It first performs an Incremental 3D Global Routing to improve only the routing.…”

Section: Related Workmentioning

confidence: 99%