2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) 2015
DOI: 10.1109/s3s.2015.7333511
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Asynchronous and synchronous designs for low-power FDSOI CMOS process optimized for subthreshold operation at 0.3V V<inf>DD</inf>

Chien-Wei Lo
1
,
Liang Men
2
,
John Brady
3
et al.
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