2017
DOI: 10.1109/tpel.2016.2530783
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Asymmetric Interleaving in Low-Voltage CMOS Power Management With Multiple Supply Rails

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Cited by 9 publications
(2 citation statements)
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“…As shown in Fig. 7, taking the phase angle of harmonic h mn i in cell i as the reference, the harmonic component h mn k in the cell k can be expressed in the "dq frame", of which the angular velocity is equal to mn: Combining (17) and ( 22), the harmonic hmn in the total output voltage of the N-cells CHB inverter can be expressed in "dq frame" as follows:…”
Section: B the Implement Of The Closed-loop Harmonic Suppression Schemementioning
confidence: 99%
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“…As shown in Fig. 7, taking the phase angle of harmonic h mn i in cell i as the reference, the harmonic component h mn k in the cell k can be expressed in the "dq frame", of which the angular velocity is equal to mn: Combining (17) and ( 22), the harmonic hmn in the total output voltage of the N-cells CHB inverter can be expressed in "dq frame" as follows:…”
Section: B the Implement Of The Closed-loop Harmonic Suppression Schemementioning
confidence: 99%
“…For instance, the modified PS-PWM with proper shifting angles calculation for CHB inverters, only considering unbalanced dc voltages, has been proposed in [15], but it does not consider the variation in the modulation indices. This method is also extended to reduce the weighted total harmonic distortion (WTHD) of the cascaded multilevel STATCOM [16]- [17]. Yet, the differences of modulating indices applied in all H-bridge submodules are ignored.…”
Section: Introductionmentioning
confidence: 99%