Asymmetric 49-Levels Cascaded MPUC Multilevel Inverter Fed by a Single DC Source

Júnior, Samuel Carvallho Silva; Jacobina, Cursino B.; Fabricio, Edgard L. L.; Felinto, Alan S.

doi:10.1109/tia.2022.3202875

Cited by 14 publications

(3 citation statements)

References 26 publications

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“…An MLI composed of 2 MPUCS fed with a single DC supply utilizing a high-frequency link has been suggested. The arrangement may produce up to 49 levels, where high voltage is provided using one single DC supply and lower voltage is tapped from high voltage using a high-frequency link 1 . A novel cascaded MLI is constituted using a series of several sub-modules supplied by several isolated DC sources.…”

Section: Introductionmentioning

confidence: 99%

A quad DC source switched three-phase multilevel DC-link inverter topology

Sivamani,

Mangaiyarkarasi,

Gandhi Raj

et al. 2024

Sci Rep

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The concept of an isolated DC source cascaded multilevel inverter finds good solutions for generating quality output voltage for low-medium power applications. It shapes the output voltage from three levels into a number of steps closer to a sinusoidal shape using small DC sources or batteries. Several advantages have been sighted like lower voltage stress and bearing noise, and lesser THD. However, a common issue in the MLIs is the total components required which increase with the rise in voltage levels. This paper proposes a three-phase MLI design having several isolated quad voltage source modules including an H-Bridge inverter. The design suggested claims reduced switching components for current conduction paths showing improved output quality. The operational features of the suggested MLI have been analyzed using Matlab/Simulink software, furthermore, an experimental module is constructed for demonstrating the effectiveness of the simulated results.

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Section: Introductionmentioning

confidence: 99%

A quad DC source switched three-phase multilevel DC-link inverter topology

Sivamani,

Mangaiyarkarasi,

Gandhi Raj

et al. 2024

Sci Rep

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“…Output voltage THD is under the IEEE-519 limit because of the seventeen voltage levels; however, the circuit is more complex owing to the number of components and the problems in balancing the charges of the capacitors. More MLIs have been documented for use in extremely sensitive applications prioritizing power quality over inverter size and cost [34]. The topology in [35] is capable of producing 17 levels of output voltage.…”

Section: Introductionmentioning

confidence: 99%

Switched Capacitor Inverter with Reduced Inrush Current and High Boosting Gain

Choudhary,

Singh,

Mandal

et al. 2024

Energies

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This article describes a 17-level switched-capacitor-based eight-times-boosting gain inverter. The inverter is made up of a DC power source, thirteen switches, three diodes, and three capacitors. The inverter produces seventeen steps during each cycle and crosses the zero line two times in one complete cycle. The proposed inverter has its polarity change mechanism; it is not necessary to use an H-bridge. Three self-balancing capacitors make up this construction. The capacitors automatically balance voltage by connecting in series/parallel to the input voltage source. Logic gates can generate gate pulses with the phase disposition pulse-width modulation technique, which helps to preserve capacitor voltage balance at the same time. The proposed structure was compared to recent papers, analyzing factors including voltage gain, DC sources, semiconductor devices, cost function, and TSV. The proposed configuration offers cost effectiveness and fewer semiconductor devices for providing a 17-level output with sufficient voltage gain. Also, to reduce the capacitor inrush current, soft charging is used. Additionally, the proposed structure’s power losses were examined, confirming its efficiency. Finally, an experimental prototype was tested to analyze and validate the suggested structure’s performance under various situations. Results show the proposed structure performs well under steady and dynamic situations.

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“…A new 49-level inverter is developed using two packed U-cell structures sharing a common DC source through a high-frequency link. This topology needs a small number of switches, and a typical design is required for a high-frequency link transformer [9]. A pair of DC sources and capacitors with several switches form a 9-level inverter, and the topology looks simple in its state of operation.…”

Section: Introductionmentioning

confidence: 99%

A New Asymmetric H-6 Structured Multilevel Inverter with Reduced Power Components

Radhakrishnan,

Arasan,

Ramalingam

et al. 2024

Symmetry

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Multilevel inverters play a key role in improving the power quality for industrial, domestic, and renewable energy sectors due to sinusoidal output voltage through small voltage steps, lesser THD (total harmonic distortion), and EMI (electromagnetic interference). There are several variants in MLI structures to generate a stepped voltage with their own operating characteristics, which flaws in switching devices with gate drivers, current conducting switches varied with varied voltage levels, and switches with different abilities in blocking voltagesto overcome increases in implementation costs and restrict its usage in high-power applications. Therefore, this article paves a solution for the above problem, which orients a new structure for asymmetric operation to propel large voltage levels with small values of switches in parallel with conventional topologies. The subtlety of the proposed topology is governed by a multicarrier pulse width modulation scheme, and ten different voltage magnitude algorithms are developed and compared foreffectiveness.Hitherto, many existing MLI topologies with reduced power switches have beendeveloped; among these, the H6 structure attempts to curtail the reduced conduction path. The operation of the suggested topology is confirmed in a Matlab/Simulink environment, and real-time performance is investigated using a laboratory prototype to accord the simulated results.

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Asymmetric 49-Levels Cascaded MPUC Multilevel Inverter Fed by a Single DC Source

Cited by 14 publications

References 26 publications

A quad DC source switched three-phase multilevel DC-link inverter topology

A quad DC source switched three-phase multilevel DC-link inverter topology

Switched Capacitor Inverter with Reduced Inrush Current and High Boosting Gain

A New Asymmetric H-6 Structured Multilevel Inverter with Reduced Power Components

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