ASSURE: RTL Locking Against an Untrusted Foundry

Pilato, Christian; Chowdhury, Animesh Basak; Sciuto, D.; Garg, Siddharth; Karri, Ramesh

doi:10.1109/tvlsi.2021.3074004

Cited by 43 publications

(40 citation statements)

References 27 publications

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“…To protect the design, we focus on the locking techniques proposed in ASSURE [5]-one of the latest RTL locking policies. ASSURE offers three locking techniques: constant, branch, and operation obfuscation.…”

Section: The Concept Of Rtl Lockingmentioning

confidence: 99%

“…Hence, an addition is always locked in pair with a subtraction, and vice versa. Note that all other operations have predefined locking pairs [5]. In case an already locked pair is relocked, both 𝑇 and 𝑇 ′ are locked separately.…”

Section: The Concept Of Rtl Lockingmentioning

confidence: 99%

“…Therefore, gate-level locking schemes operate "blindly" on the design without considering its functional traits. In response, RTL locking has emerged as a way to overcome this issue [1,5]. At the RTL, locking can use the full spectrum of semantic information, including operations, constants, and control flow constructs.…”

Section: Introductionmentioning

confidence: 99%

“…• Introduce theoretical concepts to evaluate ML-resilience of RTL locking. • Expose security faults in ASSURE RTL locking [5].…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Designing ML-Resilient Locking at Register-Transfer Level

Šišejković¹,

Collini²,

Tan³

et al. 2022

Preprint

Self Cite

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Various logic-locking schemes have been proposed to protect hardware from intellectual property piracy and malicious design modifications. Since traditional locking techniques are applied on the gate-level netlist after logic synthesis, they have no semantic knowledge of the design function. Data-driven, machine-learning (ML) attacks can uncover the design flaws within gate-level locking. Recent proposals on register-transfer level (RTL) locking have access to semantic hardware information. We investigate the resilience of ASSURE, a state-of-the-art RTL locking method, against ML attacks. We used the lessons learned to derive two ML-resilient RTL locking schemes built to reinforce ASSURE locking. We developed ML-driven security metrics to evaluate the schemes against an RTL adaptation of the state-of-the-art, ML-based SnapShot attack.

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Section: The Concept Of Rtl Lockingmentioning

confidence: 99%

Section: The Concept Of Rtl Lockingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

“…• Introduce theoretical concepts to evaluate ML-resilience of RTL locking. • Expose security faults in ASSURE RTL locking [5].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Designing ML-Resilient Locking at Register-Transfer Level

Šišejković¹,

Collini²,

Tan³

et al. 2022

Preprint

Self Cite

View full text Add to dashboard Cite

show abstract

“…In [5], the whole arithmetic function is obfuscated rather than only constants. In [6], constants can be obfuscated by simply replacing their bits by key inputs which are stored in a memory. The obfuscation technique of [7] hides filter coefficients behind decoys.…”

Section: Introductionmentioning

confidence: 99%

Hardware Obfuscation of Digital FIR Filters

Aksoy¹,

Hepp²,

Baehr³

et al. 2022

Preprint

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A finite impulse response (FIR) filter is a ubiquitous block in digital signal processing applications. Its characteristics are determined by its coefficients, which are the intellectual property (IP) for its designer. However, in a hardware efficient realization, its coefficients become vulnerable to reverse engineering. This paper presents a filter design technique that can protect this IP, taking into account hardware complexity and ensuring that the filter behaves as specified only when a secret key is provided. To do so, coefficients are hidden among decoys, which are selected beyond possible values of coefficients using three alternative methods. As an attack scenario, an adversary at an untrusted foundry is considered. A reverse engineering technique is developed to find the chosen decoy selection method and explore the potential leakage of coefficients through decoys. An oracle-less attack is also used to find the secret key. Experimental results show that the proposed technique can lead to filter designs with competitive hardware complexity and higher resiliency to attacks with respect to previously proposed methods.

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Attacks and Schemes

Šišejković

Leupers

2022

Logic Locking

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ASSURE: RTL Locking Against an Untrusted Foundry

Cited by 43 publications

References 27 publications

Designing ML-Resilient Locking at Register-Transfer Level

Designing ML-Resilient Locking at Register-Transfer Level

Hardware Obfuscation of Digital FIR Filters

Attacks and Schemes

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