Assessment of a Hardware-Implemented Machine Learning Technique Under Neutron Irradiation

Trindade, Matheus Garay; Coelho, A.; Valadares, Carlos; Viera, Raphael; Rey, Solenne; Cheymol, B.; Baylac, M.; Velazco, Raoul; Bastos, Rodrigo Possamai

doi:10.1109/tns.2019.2920747

Cited by 18 publications

(10 citation statements)

References 22 publications

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“…In the context of soft error assessment, with the exception of [34], [36] and this work, reviewed approaches do not consider resource-constraint on their experiments. The majority of these works consider either FPGA implementations of ML algorithms [9], [32], [35] or their execution on GPU [30], DNN accelerators [10], [29], [37] or generalpurpose processors [31], [33]. On the soft error mitigation side, traditional partial TMR or specific mitigation techniques have been considered either in FPGA implementations [9] or applied to specialized hardware accelerator [10] or more generic GPUs [30].…”

Section: B Review Of Soft Error Assessment Of ML Algorithmsmentioning

confidence: 99%

Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks

Abich

Gava

Garibotti

et al. 2021

IEEE Trans. Circuits Syst. I

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Deep neural networks (DNNs) are being incorporated in resource-constrained IoT devices, which typically rely on reduced memory footprint and low-performance processors. While DNNs' precision and performance can vary and are essential, it is also vital to deploy trained models that provide high reliability at low cost. To achieve an unyielding reliability and safety level, it is imperative to provide electronic computing systems with appropriate mechanisms to tackle soft errors. This paper, therefore, investigates the relationship between soft errors and model accuracy. In this regard, an extensive soft error assessment of the MobileNet model is conducted considering precision bitwidth variations (2, 4, and 8 bits) running on an Arm Cortex-M processor. In addition, this work promotes the use of a register allocation technique (RAT) that allocates the critical DNN function/layer to a pool of specific general-purpose processor registers. Results obtained from more than 4.5 million fault injections show that RAT gives the best relative performance, memory utilization, and soft error reliability trade-offs w.r.t. a more traditional replication-based approach. Results also show that the MobileNet soft error reliability varies depending on the precision bitwidth of its convolutional layers.

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Section: B Review Of Soft Error Assessment Of ML Algorithmsmentioning

confidence: 99%

Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks

Abich

Gava

Garibotti

et al. 2021

IEEE Trans. Circuits Syst. I

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“…Of the total number of samples evaluated, 7% resulted in critical failures, while 21.4% have been tolerable failures and the majority, 71.6% were masked faults. From these results, it is noticeable that it is more likely for an error not to critically interfere with the application in this study case, as in 93% of the cases, the final classification of a sample would STILL be correct, recreating roughly the results in [11]. It is worth nothing that no fault mitigating or correction has been implemented on the Binary SVM, with the overall error resilience being an intrinsic characteristic of the algorithm.…”

Section: Radiation Test Results For the Binary Svmmentioning

confidence: 83%

“…In Figure 3(a) and (b), it is noticeable that the Binary SVM is less reliable than the Multiclass version, as the reliability curve falls quicker. In [11], the authors have showed that the Binary SVM has a level of intrinsic fault tolerance. A more in-depth discussion on the reasons in presented later in Subsection 5.5.…”

Section: Resultsmentioning

confidence: 99%

“…The effects of radiation induced transients have been studied in multiple hardware implementations of machine learning algorithms. Artificial Neural Networks (ANNs) and Convolutional Neural Networks have been analyzed in [7,8,9], while [10] focused on Bayesian Machines and [11] on Binary SVM. To the best of our knowledge, no work has been conducted on the effects of thermal neutrons on hardware implemented SVMs nor the effects of radiation in Multiclass SVMs.…”

Section: Introductionmentioning

confidence: 99%

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Effects of thermal neutron radiation on a hardware-implemented machine learning algorithm

Trindade

Benevenuti

Létiche

et al. 2021

Microelectronics Reliability

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Hardware-implemented machine learning algorithms are finding their way in various domains, including safety-critical applications. This has demanded these algorithms to perform correctly even in harsh environmental conditions, such as in avionics altitudes. Support Vector Machine (SVM) is an important Machine Learning that has been target of hardware implementation in recent years. This is the first work to asses both Binary and Multiclass SVMs under thermal neutron radiation, a type of particle noticeably present in high altitudes. A fault injection campaign along with a radiation test with the D50 thermal neutron source, at the Intitut Laue-Languevin, has been performed. The results show a high intrinsic fault tolerance for both varieties of the SVM algorithm, especially for the Multiclass SVM.

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“…In real-world applications, such as IoT, airspace, and driver-less cars, CNNs can potentially experience different types of faults. Various works evaluate CNN reliability on faulty real hardware, e.g., soft errors [61,62,112,13] and undervolting in ASICs [59,17,116,117,54]. This approach requires significant engineering effort but can result in relatively more accurate results.…”

Section: Reliability Of Cnnsmentioning

confidence: 99%

An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration

Salami¹,

Onural

Yüksel

et al. 2020

2020 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)

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We empirically evaluate an undervolting technique, i.e., underscaling the circuit supply voltage below the nominal level, to improve the power-efficiency of Convolutional Neural Network (CNN) accelerators mapped to Field Programmable Gate Arrays (FPGAs). Undervolting below a safe voltage level can lead to timing faults due to excessive circuit latency increase. We evaluate the reliability-power trade-off for such accelerators. Specifically, we experimentally study the reduced-voltage operation of multiple components of real FPGAs, characterize the corresponding reliability behavior of CNN accelerators, propose techniques to minimize the drawbacks of reduced-voltage operation, and combine undervolting with architectural CNN optimization techniques, i.e., quantization and pruning. We investigate the effect of environmental temperature on the reliability-power trade-off of such accelerators.We perform experiments on three identical samples of modern Xilinx ZCU102 FPGA platforms with five state-of-the-art image classification CNN benchmarks. This approach allows us to study the effects of our undervolting technique for both software and hardware variability. We achieve more than 3X power-efficiency (GOPs/W ) gain via undervolting. 2.6X of this gain is the result of eliminating the voltage guardband region, i.e., the safe voltage region below the nominal level that is set by FPGA vendor to ensure correct functionality in worst-case environmental and circuit conditions. 43% of the power-efficiency gain is due to further undervolting below the guardband, which comes at the cost of accuracy loss in the CNN accelerator. We evaluate an effective frequency underscaling technique that prevents this accuracy loss, and find that it reduces the power-efficiency gain from 43% to 25%.

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Assessment of a Hardware-Implemented Machine Learning Technique Under Neutron Irradiation

Cited by 18 publications

References 22 publications

Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks

Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks

Effects of thermal neutron radiation on a hardware-implemented machine learning algorithm

An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration

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