Asc

Abstract

We present an architecture designed to transparently and automatically scale the performance of sequential programs as a function of the hardware resources available. The architecture is predicated on a model of computation that views program execution as a walk through the enormous state space composed of the memory and registers of a single-threaded processor. Each instruction execution in this model moves the system from its current point in state space to a deterministic subsequent point. We can parallelize such execution by predictively partitioning the complete path and speculatively executing each partition in parallel. Accurately partitioning the path is a challenging prediction problem. We have implemented our system using a functional simulator that emulates the x86 instruction set, including a collection of state predictors and a mechanism for speculatively executing threads that explore potential states along the execution path. While the overhead of our simulation makes it impractical to measure speedup relative to native x86 execution, experiments on three benchmarks show scalability of up to a factor of 256 on a 1024 core machine when executing unmodified sequential programs.

Automatic Parallelization of Sequential Programs

“…Thus, we wish to augment our cache with masks that identify every bit on which a speculative execution depends (the read-mask) and every bit written by the execution (the write-mask). These masks play the same role as those introduced by Waterland et al [29]; we review their use here for completeness.…”

“…The kernels adopted from the original ASC [29] work are: collatz: A kernel that iterates through a range of positive integers, testing if each satisfies the Collatz conjecture. The Collatz conjecture states that if one starts with some positive integer n and sequentially divides it by two if it is even and multiplies by three and adds one if it is odd, the sequence will eventually converge to one.…”

“…It iterates through a linked list of spin configurations, identifying the element in the list with the lowest energy state. It is interesting because existing parallelizing compilers cannot parallelize it due to the pointer dereferencing [29]. NewAge parallelizes it by predicting values referencing later nodes of the linked list.…”

“…With the end of Dennard scaling [8], enabling software to take advantage of multiple cores has become even more urgent. We adopt the Automatically Scalable Computation (ASC) architecture, which transforms the problem of automatic parallelization to one of prediction and speculation [29]. The original ASC implementation ran on a software emulation of x86; thus, although it demonstrated promising scaling capabilities, it failed to achieve true speedup relative to native hardware execution.…”

“…Workers place the pair of predicted and speculated states into the cache as a single cache entry. Figure 1 (drawn heavily from Waterland et al [29]) shows the overall ASC architecture and execution paths.…”