Armed Cats

Abstract

We report on the process for formal concurrency modelling at Arm. An initial formal consistency model of the Arm achitecture, written in the cat language, was published and upstreamed to the herd+diy tool suite in 2017. Since then, we have extended the original model with extra features, for example, mixed-size accesses, and produced two provably equivalent alternative formulations. In this article, we present a comprehensive review of work done at Arm on the consistency model. Along the way, we also show that our principle for handling mixed-size accesses applies to x86: We confirm this via vast experimental campaigns. We also show that our alternative formulations are applicable to any model phrased in a style similar to the one chosen by Arm.

Dynamic Partial Order Reduction Based on Interference Solution

“…The existing DPOR algorithms [8,9,11,13,18,[21][22][23][24][25][26][27] typically proceed to detect a pair of competing access periods after exploring a program trace and then investigating other traces containing the competing accesses in the reverse order to avoid re-exploring equivalent execution traces while maintaining some state information. Nonetheless, existing algorithms may reveal an exponential number of traces even for non-optimal cases such as for programs near O(n!)…”