2010
DOI: 10.1080/00207210902894787
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Area, speed and power measurements of FPGA-based complex orthogonal space-time block code channel encoders

Abstract: Space-time coding (STC) is an important milestone in modern wireless communications. In this technique, more copies of the same signal are transmitted through different antennas (space) and different symbol periods (time), to improve the robustness of a wireless system by increasing its diversity gain. STCs are channel coding algorithms that can be readily implemented on a field programmable gate array (FPGA) device. This work provides some figures for the amount of required FPGA hardware resources, the speed … Show more

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Cited by 3 publications
(2 citation statements)
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“…A complete description of the Xilinx FPGA CAD design flow is illustrated in Figure 7 and is described in more detail in Passas, Freear and Fawcett (2010). The figure shows all design steps from code editing and functional testing down to downloading the code into a real FPGA hardware.…”
Section: Lut-based Implementations With More Luts Per Antennamentioning
confidence: 99%
“…A complete description of the Xilinx FPGA CAD design flow is illustrated in Figure 7 and is described in more detail in Passas, Freear and Fawcett (2010). The figure shows all design steps from code editing and functional testing down to downloading the code into a real FPGA hardware.…”
Section: Lut-based Implementations With More Luts Per Antennamentioning
confidence: 99%
“…Kohli Hui and Wang (2010) have emphasised on the requirement of accurate channel modelling encompassing antenna characteristics in the presence of scatterers, which is the backbone of the space-time block coding (STBC) based on MIMO technique for the reliable high data rate wireless transmissions (Passas, Freear, and Fawcett 2010). The performance evaluation of STBC code division multiple access system (Yu, Dong, Xu, and Bi 2010) in the presence of a ring-type cluster of scatterers is under investigation.…”
mentioning
confidence: 99%