Area-optimized FPGA implementation of a digital FM modulator

Uusikartano, R.; Nittylahti, J.; Renfors, Markku

doi:10.1109/iscas.1999.780016

Cited by 10 publications

(3 citation statements)

References 8 publications

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“…The ADC is sampled at a lower rate with fewer bits and therefore some sampling rate conversion and or interpolation is required. Interpolation method described in [18] could be used in this circumstance. If the ADC sampling rate is chosen to be some binary division of the DDS clock, then the difference between two consecutive A/D output samples could be divided by the same binary factor and then added to the previous sample at every DDS clock until a new sample is available.…”

Section: B Modulationmentioning

confidence: 99%

Design and Implementation of a Re-Configurable Versatile Direct Digital Synthesis-Based Pulse Generator

Sharma

Sun

Simpson

2021

IEEE Trans. Instrum. Meas.

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Direct digital synthesis (DDS) technology has replaced many traditional analogue circuit functions. The frequency, amplitude and phase of a waveform generated using DDS can be precisely controlled. It is possible to achieve remarkably high frequency resolution, fast frequency switching, and modulation can be easily introduced in a DDS generator. However, pulse waveform generated using DDS requires reloading of the pulse waveform in the waveform memory to vary the pulse parameters which causes phase discontinuity, requires prohibitively large memory to generate pulses with narrow widths and long periods and suffers from trigger uncertainty of up to one clock period when the pulse waveform is triggered by an external event. Moreover, it is not possible to modulate the width and delay of the pulse stored in the waveform memory. This paper describes a fully functional, low complexity, low cost, memory less, parallel and DDS based pulse waveform generator implemented in a lowcost field programmable gate arrays (FPGA) where pulse parameters such as amplitude, period, width, rise time, fall time and delay can all be varied without any glitches or phase discontinuity, where the amplitude, frequency and phase, as well as period, width and delay of the pulse can be modulated by an internally generated or external modulating signal and where it is possible to trigger the generation of the pulse or burst of pulses by an external event where the time between the trigger event and the pulse output is fixed.

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Section: B Modulationmentioning

confidence: 99%

Design and Implementation of a Re-Configurable Versatile Direct Digital Synthesis-Based Pulse Generator

Sharma

Sun

Simpson

2021

IEEE Trans. Instrum. Meas.

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“…Some of these have laid stress on reducing the distortion effects of quantization noise, which occurs due to the bit resolution at the input and output of the DDFS [1]. Some of them have discussed the area optimization and low-power consumption [2][3][4] as main objective. In the present work, one high-speed, low-power, and reduced-area digital FM modulator has been implemented in the FPGA device to support the audio broadcasting system in software-defined radio (SDR) system.…”

Section: Introductionmentioning

confidence: 99%

A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation

Hatai

Chakrabarti

2011

International Journal of Reconfigurable Computing

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This paper deals with an FPGA implementation of a high performance FM modulator and demodulator for software defined radio (SDR) system. The individual component of proposed FM modulator and demodulator has been optimized in such a way that the overall design consists of a high-speed, area optimized and low-power features. The modulator and demodulator contain an optimized direct digital frequency synthesizer (DDFS) based on quarter-wave symmetry technique for generating the carrier frequency with spurious free dynamic range (SFDR) of more than 64 dB. The FM modulator uses pipelined version of the DDFS to support the up conversion in the digital domain. The proposed FM modulator and demodulator has been implemented and tested using XC2VP30-7ff896 FPGA as a target device and can operate at a maximum frequency of 334.5 MHz and 131 MHz involving around 1.93 K and 6.4 K equivalent gates for FM modulator and FM demodulator respectively. After applying a 10 KHz triangular wave input and by setting the system clock frequency to 100 MHz using Xpower the power has been calculated. The FM modulator consumes 107.67 mW power while FM demodulator consumes 108.67 mW power for the same input running at same data rate.

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“…Some works have laid stress on reducing the distortion effects of quantisation noise, which occurs owing to the difference in bit resolutions at the input and output of the DDFS (Twelves and Kikkert, 1996). Area optimisation and low-power consumption (Lathi and Niemisto, 1998;Unsikartano et al, 1999;Twelves and Kikkert, 1997) have been the main objectives. In this work, a low-power, low-area and high-speed programmable modulator capable of performing both GMSK and FM methods has been implemented in FPGA to support the different standards as listed in Table 1 in SDR system, whereas Table 2 indicates the different parameters for the GSM and DECT mobile protocols.…”

Section: Introductionmentioning

confidence: 99%

Programmable Common Baseband Modulator for Software Defined Radio system

Hatai

Chakrabarti

2011

IJSISE

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In Software Defined Radio (SDR), a single hardware structure can be reused to conform to different standards by simply changing some parameter. A low-power, high-speed, low-area parameter-controlled Common Baseband Modulator (CBM) architecture has been proposed in this paper. Using control parameters, the proposed CBM can be configured to support Gaussian Minimum Shift Keying (GMSK) as well as Frequency Modulation (FM) schemes. The design, which is fully pipelined, can operate at a maximum data rate of 276 Mbps. The proposed CBM consumes maximum dynamic power of 108.41 mW when running at 100 Mbps and using only 22.7 kilo equivalent gates.

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Area-optimized FPGA implementation of a digital FM modulator

Cited by 10 publications

References 8 publications

Design and Implementation of a Re-Configurable Versatile Direct Digital Synthesis-Based Pulse Generator

Design and Implementation of a Re-Configurable Versatile Direct Digital Synthesis-Based Pulse Generator

A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation

Programmable Common Baseband Modulator for Software Defined Radio system

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