Area-delay efficient parallel architecture for Fermat number transform

Abstract

Abstract:The parallel Fermat number transform (FNT) architecture is usually implemented with the code conversion (CC) and the butterfly operation (BO) in the diminished-1 number system. However, both the CC and the BO require too much area and delay due to modulo 2 n +1 carry-propagation addition. In this paper, we propose a novel parallel FNT architecture with the root of unity 2 which is mainly composed of carry-save code conversion (CSCC) and carry-save butterfly operation (CSBO). The CSCC and the CSBO remove the carrypropagation addition by exploiting the property of carry-save adders. Thus the proposed FNT architecture requires less area and delay than the previous one. Synthesis results using 0.13-µm CMOS standard cells library demonstrate the superiority of the resulting architecture against the previously reported solution.

FNT-Based Reed-Solomon Erasure Codes

“…Indeed, the FNT, which is a special case of FFT could benefit from parallel computing (multi-threading, GPU computing). Another interesting point is the re-use of existing optimized software and hardware implementations [20] [13].…”

“…Another benefit of our approach is that the connection of erasure codes with FNT could allow to re-use the optimized software and hardware implementations [13] developed for the applications of FNT in various domains like multi-precision multiplication, audio or image filtering.…”

“…Another benefit of our approach is that the connection of erasure codes with FNT could allow to re-use the optimized software and hardware implementations [13] Assuming that q is prime, the values 0, 1, ..., q − 1 form a finite field where addition and product are processed modulo q. This finite field is known as the Galois field GF (q) [11].…”

Area-delay efficient arithmetic Mixed-Radix Conversion for Fermat moduli

“…A carry save implementation of Dim1 is described in [6] which overcomes the zero detection problem. This concept has been used herein to build an MRC architecture with less area and delay than existing cell based implementations.…”

Data-recovery algorithm and circuit for cyclic convolution based on FNT

“…It can be implemented more efficiently based on the Fermat number transform (FNT) than based on the fast Fourier transform (FFT) since the FNT possesses the property of cyclic convolution and low computational complexity [1,2]. The expensive multiplications in the FFT and its inverse (IFFT) can be replaced by bit shifts in the FNT and its inverse (IFNT) with the transform kernel 2 or its integer power.…”